From 6774407160d1f6c7270c7a2ee709e9bd0981d9a5 Mon Sep 17 00:00:00 2001
From: Piotr Kosycarz <piotr.kosycarz@nordicsemi.no>
Date: Wed, 18 Jun 2025 13:36:35 +0200
Subject: [PATCH] boards: nordic: nrf54lv10dk: single place for uart pin defs

Merge configuration, add mising CTS/RTS pins for uart20.

Signed-off-by: Piotr Kosycarz <piotr.kosycarz@nordicsemi.no>
---
 .../nrf54lv10dk_nrf54lv10a-pinctrl.dtsi       | 10 +++++---
 ...rf54lv10dk_nrf54lv10a_cpuapp_0_2_0.overlay | 21 ----------------
 ...f54lv10dk_nrf54lv10a_cpuflpr_0_2_0.overlay | 25 -------------------
 3 files changed, 7 insertions(+), 49 deletions(-)

diff --git a/boards/nordic/nrf54lv10dk/nrf54lv10dk_nrf54lv10a-pinctrl.dtsi b/boards/nordic/nrf54lv10dk/nrf54lv10dk_nrf54lv10a-pinctrl.dtsi
index 46626bcc9c53..716486704378 100644
--- a/boards/nordic/nrf54lv10dk/nrf54lv10dk_nrf54lv10a-pinctrl.dtsi
+++ b/boards/nordic/nrf54lv10dk/nrf54lv10dk_nrf54lv10a-pinctrl.dtsi
@@ -6,11 +6,13 @@
 &pinctrl {
 	/omit-if-no-ref/ uart20_default: uart20_default {
 		group1 {
-			psels = <NRF_PSEL(UART_TX, 1, 4)>;
+			psels = <NRF_PSEL(UART_TX, 1, 4)>,
+				<NRF_PSEL(UART_RTS, 1, 6)>;
 		};
 
 		group2 {
-			psels = <NRF_PSEL(UART_RX, 1, 5)>;
+			psels = <NRF_PSEL(UART_RX, 1, 5)>,
+				<NRF_PSEL(UART_CTS, 1, 7)>;
 			bias-pull-up;
 		};
 	};
@@ -18,7 +20,9 @@
 	/omit-if-no-ref/ uart20_sleep: uart20_sleep {
 		group1 {
 			psels = <NRF_PSEL(UART_TX, 1, 4)>,
-				<NRF_PSEL(UART_RX, 1, 5)>;
+				<NRF_PSEL(UART_RX, 1, 5)>,
+				<NRF_PSEL(UART_RTS, 1, 6)>,
+				<NRF_PSEL(UART_CTS, 1, 7)>;
 			low-power-enable;
 		};
 	};
diff --git a/boards/nordic/nrf54lv10dk/nrf54lv10dk_nrf54lv10a_cpuapp_0_2_0.overlay b/boards/nordic/nrf54lv10dk/nrf54lv10dk_nrf54lv10a_cpuapp_0_2_0.overlay
index 81270a88b432..62a01fea907e 100644
--- a/boards/nordic/nrf54lv10dk/nrf54lv10dk_nrf54lv10a_cpuapp_0_2_0.overlay
+++ b/boards/nordic/nrf54lv10dk/nrf54lv10dk_nrf54lv10a_cpuapp_0_2_0.overlay
@@ -49,24 +49,3 @@
 &hfpll {
 	clock-frequency = <DT_FREQ_M(128)>;
 };
-
-&pinctrl {
-	/omit-if-no-ref/ uart20_default: uart20_default {
-		group1 {
-			psels = <NRF_PSEL(UART_TX, 1, 4)>;
-		};
-
-		group2 {
-			psels = <NRF_PSEL(UART_RX, 1, 5)>;
-			bias-pull-up;
-		};
-	};
-
-	/omit-if-no-ref/ uart20_sleep: uart20_sleep {
-		group1 {
-			psels = <NRF_PSEL(UART_TX, 1, 4)>,
-				<NRF_PSEL(UART_RX, 1, 5)>;
-			low-power-enable;
-		};
-	};
-};
diff --git a/boards/nordic/nrf54lv10dk/nrf54lv10dk_nrf54lv10a_cpuflpr_0_2_0.overlay b/boards/nordic/nrf54lv10dk/nrf54lv10dk_nrf54lv10a_cpuflpr_0_2_0.overlay
index 7d5b030d53c2..62a01fea907e 100644
--- a/boards/nordic/nrf54lv10dk/nrf54lv10dk_nrf54lv10a_cpuflpr_0_2_0.overlay
+++ b/boards/nordic/nrf54lv10dk/nrf54lv10dk_nrf54lv10a_cpuflpr_0_2_0.overlay
@@ -49,28 +49,3 @@
 &hfpll {
 	clock-frequency = <DT_FREQ_M(128)>;
 };
-
-&pinctrl {
-	/omit-if-no-ref/ uart30_default: uart30_default {
-		group1 {
-			psels = <NRF_PSEL(UART_TX, 0, 0)>,
-				<NRF_PSEL(UART_RTS, 0, 2)>;
-		};
-
-		group2 {
-			psels = <NRF_PSEL(UART_RX, 0, 1)>,
-				<NRF_PSEL(UART_CTS, 0, 3)>;
-			bias-pull-up;
-		};
-	};
-
-	/omit-if-no-ref/ uart30_sleep: uart30_sleep {
-		group1 {
-			psels = <NRF_PSEL(UART_TX, 0, 0)>,
-				<NRF_PSEL(UART_RX, 0, 1)>,
-				<NRF_PSEL(UART_RTS, 0, 2)>,
-				<NRF_PSEL(UART_CTS, 0, 3)>;
-			low-power-enable;
-		};
-	};
-};