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1 parent f0b4207 commit b4192aaCopy full SHA for b4192aa
src/libcore/sync/atomic.rs
@@ -21,9 +21,10 @@
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//!
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//! Each method takes an `Ordering` which represents the strength of
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//! the memory barrier for that operation. These orderings are the
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-//! same as [LLVM atomic orderings][1].
+//! same as [LLVM atomic orderings][1]. For more information see the [nomicon][2]
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//! [1]: http://llvm.org/docs/LangRef.html#memory-model-for-concurrent-operations
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+//! [2]: https://doc.rust-lang.org/nomicon/atomics.html
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//! Atomic variables are safe to share between threads (they implement `Sync`)
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//! but they do not themselves provide the mechanism for sharing and follow the
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