From 922ca3282dc1dc009f2166e3d84450468fb2fc4f Mon Sep 17 00:00:00 2001
From: Masahiro Hiramori <contact@mshr-h.com>
Date: Wed, 11 Jun 2025 12:45:22 +0900
Subject: [PATCH] Add DocumentSymbolProvider integration test

---
 package.json                          |  2 +-
 src/test/runTest.ts                   |  2 +-
 src/test/suite/documentSymbol.test.ts | 20 ++++++++++++++++++++
 3 files changed, 22 insertions(+), 2 deletions(-)
 create mode 100644 src/test/suite/documentSymbol.test.ts

diff --git a/package.json b/package.json
index 8dd3d9b7..ac0101d9 100644
--- a/package.json
+++ b/package.json
@@ -592,7 +592,7 @@
     "syntax": "js-yaml ./syntaxes/systemverilog.tmLanguage.yaml >./syntaxes/systemverilog.tmLanguage.json",
     "makeBsv": "antlr4ts -visitor syntaxes/bsv.g4 -o src/bsvjs",
     "pretest": "npm run compile-tests && npm run compile && npm run lint",
-    "test": "node ./out/src/test/bsv.js"
+    "test": "node ./out/src/test/runTest.js"
   },
   "dependencies": {
     "antlr4": "^4.13.1-patch-1",
diff --git a/src/test/runTest.ts b/src/test/runTest.ts
index 0ce2848f..c98f746c 100644
--- a/src/test/runTest.ts
+++ b/src/test/runTest.ts
@@ -7,7 +7,7 @@ async function main() {
 	try {
 		// The folder containing the Extension Manifest package.json
 		// Passed to `--extensionDevelopmentPath`
-		const extensionDevelopmentPath = path.resolve(__dirname, '../../');
+                const extensionDevelopmentPath = path.resolve(__dirname, '../../../');
 
 		// The path to test runner
 		// Passed to --extensionTestsPath
diff --git a/src/test/suite/documentSymbol.test.ts b/src/test/suite/documentSymbol.test.ts
new file mode 100644
index 00000000..68010e1c
--- /dev/null
+++ b/src/test/suite/documentSymbol.test.ts
@@ -0,0 +1,20 @@
+import * as assert from 'assert';
+import * as vscode from 'vscode';
+import * as path from 'path';
+
+suite('VerilogDocumentSymbolProvider', () => {
+  test('returns symbols for simple verilog file', async () => {
+    const filePath = path.resolve(__dirname, '../../../language_examples/verilog_building_block/rtl/ram_sp.v');
+    const document = await vscode.workspace.openTextDocument(filePath);
+    await vscode.window.showTextDocument(document);
+
+    await vscode.workspace.getConfiguration('verilog').update('ctags.path', 'ctags', vscode.ConfigurationTarget.Global);
+
+    const symbols = await vscode.commands.executeCommand<vscode.DocumentSymbol[]>(
+      'vscode.executeDocumentSymbolProvider',
+      document.uri
+    );
+
+    assert.ok(symbols && symbols.length > 0, 'Expected at least one document symbol');
+  });
+});