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1 parent 746ca48 commit 36fcabaCopy full SHA for 36fcaba
core/src/num/f32.rs
@@ -957,6 +957,7 @@ impl f32 {
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} else if self == other {
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if self.is_sign_negative() && other.is_sign_positive() { self } else { other }
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} else {
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+ // At least one input is NaN. Use `+` to perform NaN propagation and quieting.
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self + other
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}
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core/src/num/f64.rs
@@ -968,6 +968,7 @@ impl f64 {
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