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MCU Info Page: STM32H7 Family
Since its launch in 2017, the STM32H7 family has risen to an impressive level of popularity. As they boast high clock rates and powerful peripherals, yet are still reasonably simple to integrate into a PCB design, there's a lot to love on these chips! Mbed OS currently supports a number of STM32H7 MCUs, and this page will provide comparisons of each and some background information.
Each sub-family has generally the same configuration, the only differences within a sub-family are the presence or absence of certain peripherals (e.g. cryptography and display controllers), the package, and the amount of flash memory.
Sub-Family | MCUs Supported by Mbed | Auxilliary M4 Core | TCM RAM | Other RAM | Core Clock (Overdrive*/Standard) | AHB Clock (Overdrive/Standard) |
---|---|---|---|---|---|---|
STM32H72x Family | STM32H723xG STM32H725xE STM32H735xG | 64kiB ITCM (+192kiB that can be remapped from SRAM_D1), 128kiB DTCM | 320kiB SRAM_D1 32kiB SRAM_D2 16kiB SRAM_D3 4kiB Backup SRAM | 550MHz/400MHz | 275MHz/200MHz | |
STM32H743 Family | STM32H743xI STM32H753xI STM32H750xB | 64kiB ITCM, 128kiB DTCM | 512kiB SRAM_D1 288kiB SRAM_D2 64kiB SRAM_D3 4kiB Backup SRAM | 480MHz/400MHz | 240MHz/200MHz | |
STM32H745/47 Family | STM32H745xI STM32H747xI | Yes | 64kiB ITCM, 128kiB DTCM | 512kiB SRAM_D1 288kiB SRAM_D2 64kiB SRAM_D3 4kiB Backup SRAM | 480MHz/400MHz | 240MHz/200MHz |
STM32H7Ax Family | STM32H7A3xI STM32H7B3xI | 64kiB ITCM, 128kiB DTCM | 1MiB AXI SRAM, 128kiB AHB SRAM 32kiB SRD SRAM 4kiB Backup SRAM | 280MHz/200MHz | 280MHz/200MHz |
- Overdrive (also known as VOS0) is an overclock mode that increases CPU speed but does not work over the full temperature range, does not work with some power configurations, and is not recommended for safety related applications.
MCU | Mbed Target(s) | Auxilliary M4 Core | TCM RAM | Other RAM | Flash | Core Clock (Overdrive*/Standard) | AHB Clock (Overdrive/Standard) |
---|---|---|---|---|---|---|---|
STM32H723xG | NUCLEO_H723ZG | 64kiB ITCM (+192kiB that can be remapped from SRAM_D1), 128kiB DTCM | 320kiB SRAM_D1 32kiB SRAM_D2 16kiB SRAM_D3 4kiB Backup SRAM | 1MiB, clocked at 70MHz | 550MHz/400MHz | 275MHz/200MHz | |
STM32H725xE | WIO_H725AE | 64kiB ITCM (+192kiB that can be remapped from SRAM_D1), 128kiB DTCM | 320kiB SRAM_D1 32kiB SRAM_D2 16kiB SRAM_D3 4kiB Backup SRAM | 512kiB, clocked at 70MHz | 550MHz/400MHz | 275MHz/200MHz | |
STM32H735xG | 64kiB ITCM (+192kiB that can be remapped from SRAM_D1), 128kiB DTCM | 320kiB SRAM_D1 32kiB SRAM_D2 16kiB SRAM_D3 4kiB Backup SRAM | 2MiB, clocked at 70MHz | 550MHz/400MHz | 275MHz/200MHz | ||
STM32H743xI STM32H753xI |
NUCLEO_H743ZI2 | 64kiB ITCM, 128kiB DTCM | 512kiB SRAM_D1 288kiB SRAM_D2 64kiB SRAM_D3 4kiB Backup SRAM | 2MiB in two banks, clocked at 70MHz | 480MHz/400MHz | 240MHz/200MHz | |
STM32H745xI | NUCLEO_H745ZI_Q_CM7 NUCLEO_H745ZI_Q_CM4 |
Yes | 64kiB ITCM, 128kiB DTCM | 512kiB SRAM_D1 288kiB SRAM_D2 64kiB SRAM_D3 4kiB Backup SRAM | 2MiB in two banks, clocked at 70MHz | 480MHz/400MHz | 240MHz/200MHz |
STM32H747xI | DISCO_H747I_CM7 DISCO_H747I_CM4 ARDUINO_PORTENTA_H7_M7 ARDUINO_PORTENTA_H7_M4 |
Yes | 64kiB ITCM, 128kiB DTCM | 512kiB SRAM_D1 288kiB SRAM_D2 64kiB SRAM_D3 4kiB Backup SRAM | 2MiB in two banks, clocked at 70MHz | 480MHz/400MHz | 240MHz/200MHz |
STM32H750xB | 280MHz/200MHz | 280MHz/200MHz | |||||
STM32H7A3xI STM32H7B3xI |
NUCLEO_H7A3ZI_Q | 280MHz/200MHz | 280MHz/200MHz |
The STM32H7 can be seen as a direct competitor to NXP's MIMXRT family of devices (e.g. the MIMXRT105x). Both MCUs hit some of the highest clock rates available in Cortex-M microprocessors, and both are to some extent the flagship line from their respective companies. Having used MCUs from both families quite a bit, I'd say that I'm in a good position to compare them.
I would say that the strengths of STM32H7 are circuit simplicity, documentation, and features. Designing a circuit for an STM32H7 micro is fairly straightforward: you just feed in a clock signal and add capacitors to the pins that the datasheet tells you to. MIMXRTs, in contrast, have a mandatory switching regulator that has to be routed and require an external flash chip (+ the correct software configs for it). And STMicro documentation, while not perfect, at least makes an effort to tell you what things do and how to configure them. MIMXRT docs, however, are decidedly mediocre, and are full of confusing, badly formatted diagrams and weirdly worded explanations. Last but not least, STM32H7 MCUs have a wide breadth of features available, such as an arbitrary polynomial CRC accelerator, a DAC, and a JPEG codec. While MIMXRT MCUs have all the standard features one would expect for a microcontroller, they don't really have fun extras like these.
Another thing to note is that STM32H7x devices have much faster flash read speed than the MIMXRT line. STM32H7 can read 64 bits from flash at 70MHz, while (assuming you use an OSPI flash) MIMXRTs can read 8 bits at 133MHz. This means MIMXRTs are a lot more reliant on instruction caching and storing functions in ITCM in order to hit their max speed without being limited by the speed that the core can load instructions from flash.
Meanwhile, the MIMXRT family has its own strengths: speed and MCU simplicity. MIMXRTs can reach a faster core speed than STM32H7s, so they will be the winners in workloads that are very heavily CPU bound. And their bus speeds go higher as well on some models, so even for memory-bound workloads, they will likely take the upper hand. Also, there is a fundamental simplicity of design that one can appreciate about MIMXRT chips, even if it's a bit abstract. For instance, almost all MIMXRTs have a single unified address space*, where all the DMA and MCUs can access all the peripherals -- even if the bus architecture isn't unified, at least the addressing is. Meanwhile, STM32H7 has a highly complex address map where each peripheral in each domain can only access specific other domains and peripherals. Sometimes that isolation might be useful, but it causes a lot of programming complexity. Another example is, MIMXRT MCUs have an elegant, unified crossbar (XBAR) interconnect that goes between virtually every peripheral. Though it's not perfect, it lets you build all sorts of interesting digital logic contraptions using the fabric of the MCU itself.
*MIMXRT117x and some of its relatives have an errata that interferes with this
So all in all, it's hard to really pick one or the other as better or worse; they are just good at different things. If you can handle the circuit complexity and documentation, I would recommend not discounting the MIMXRT as a possible competitor for the STM32H7!