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[ac_range_check,dv] Included logging support in testbench
This commit includes covergroups for logging registers as well as introducing logging in the smoke sequence. Signed-off-by: LouisTheLuis <luism@zerorisc.com>
1 parent 1b1945f commit 0817df5

20 files changed

+1070
-86
lines changed

hw/ip_templates/ac_range_check/dv/ac_range_check_sim_cfg.hjson.tpl

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -54,6 +54,11 @@
5454
uvm_test_seq: ac_range_check_smoke_racl_vseq
5555
reseed: 20
5656
}
57+
{
58+
name: ac_range_check_smoke_high_threshold
59+
uvm_test_seq: ac_range_check_smoke_high_threshold_vseq
60+
reseed: 20
61+
}
5762
{
5863
name: ac_range_check_bypass
5964
uvm_test_seq: ac_range_check_bypass_vseq
@@ -72,12 +77,16 @@
7277
regressions: [
7378
{
7479
name: smoke
75-
tests: ["ac_range_check_smoke", "ac_range_check_smoke_racl"]
80+
tests: ["ac_range_check_smoke",
81+
"ac_range_check_smoke_racl",
82+
"ac_range_check_smoke_high_threshold"
83+
]
7684
}
7785
{
7886
name: normal
7987
tests: ["ac_range_check_smoke",
8088
"ac_range_check_smoke_racl",
89+
"ac_range_check_smoke_high_threshold",
8190
"ac_range_check_bypass",
8291
"ac_range_check_lock_range"
8392
]

hw/ip_templates/ac_range_check/dv/env/ac_range_check_env.core.tpl

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -11,6 +11,7 @@ filesets:
1111
- lowrisc:dv:cip_lib
1212
- lowrisc:dv:dv_base_reg
1313
- lowrisc:dv:dv_lib
14+
- ${instance_vlnv(f"lowrisc:ip:{module_instance_name}:0.1")}
1415
files:
1516
- ac_range_check_env_pkg.sv
1617
- ac_range_check_dut_cfg.sv: {is_include_file: true}
@@ -26,6 +27,7 @@ filesets:
2627
- seq_lib/ac_range_check_common_vseq.sv: {is_include_file: true}
2728
- seq_lib/ac_range_check_smoke_vseq.sv: {is_include_file: true}
2829
- seq_lib/ac_range_check_smoke_racl_vseq.sv: {is_include_file: true}
30+
- seq_lib/ac_range_check_smoke_high_threshold_vseq.sv: {is_include_file: true}
2931
- seq_lib/ac_range_check_bypass_vseq.sv: {is_include_file: true}
3032
- seq_lib/ac_range_check_lock_range_vseq.sv: {is_include_file: true}
3133
- seq_lib/ac_range_check_stress_all_vseq.sv: {is_include_file: true}

hw/ip_templates/ac_range_check/dv/env/ac_range_check_env_cov.sv

Lines changed: 129 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@
99
*/
1010

1111
class ac_range_check_env_cov extends cip_base_env_cov #(.CFG_T(ac_range_check_env_cfg));
12-
12+
import ac_range_check_reg_pkg::*;
1313
`uvm_component_utils(ac_range_check_env_cov)
1414

1515
// The base class provides the following handles for use:
@@ -18,11 +18,11 @@ class ac_range_check_env_cov extends cip_base_env_cov #(.CFG_T(ac_range_check_en
1818
// Holds the type of TLUL transaction being processed by the predictor
1919
ac_range_check_env_pkg::access_type_e access_type_cp;
2020

21-
int idx_cp; // Range Index for which coverage is sampled
22-
bit read_cp; // Read permission from CSR Attr field 1 = enabled, 0 = disabled
23-
bit write_cp; // Write permission from CSR Attr field 1 = enabled, 0 = disabled
24-
bit execute_cp; // Execute permission from CSR Attr field 1 = enabled, 0 = disabled
25-
int role_cp; // Holds RACL Role Identifier
21+
int idx_cp; // Range Index for which coverage is sampled
22+
bit read_cp; // Read permission from CSR Attr field 1 = enabled, 0 = disabled
23+
bit write_cp; // Write permission from CSR Attr field 1 = enabled, 0 = disabled
24+
bit execute_cp; // Execute permission from CSR Attr field 1 = enabled, 0 = disabled
25+
int role_cp; // Holds RACL Role Identifier
2626

2727
bit access_permit_cp; // Access due to permissions 1 = Access permitted, 0 = Access denied
2828
bit racl_cp; // Access due to RACL Check 1 = Access permitted, 0 = Access denied
@@ -34,6 +34,14 @@ class ac_range_check_env_cov extends cip_base_env_cov #(.CFG_T(ac_range_check_en
3434

3535
bit bypass_cp; // Bypass Mode 1 = enabled, 0 = disabled
3636
bit lock_idx_cp; // Status of lock bit for an index 1 = locked, 0 = unlocked
37+
38+
bit log_enable_cp; // Log enable 1 = enabled, 0 = disabled
39+
bit log_denied_cp; // Log denied access 1 = enabled, 0 = disabled
40+
bit log_written_cp; // Have the log registers been written to? 1 = written, 0 = empty
41+
bit log_denied_access_cp; // Log denied access for range field 1 = enabled, 0 = disabled
42+
int deny_th_cp; // Deny threshold
43+
bit cnt_reached_cp; // deny_cnt >= deny_cnt_threshold? 1 = greater or equal, 0 = lesser
44+
bit intr_state_cp; // intr_state register 1 = greater or equal, 0 = lesser
3745

3846
// Primary covergroup that verifies the operation of AC_RANGE_CHECK module.
3947
// There are 4 parts to the cross in this covergroup.
@@ -57,8 +65,6 @@ class ac_range_check_env_cov extends cip_base_env_cov #(.CFG_T(ac_range_check_en
5765
coverpoint read_cp { bins disabled = {0}; bins enabled = {1}; }
5866
coverpoint write_cp { bins disabled = {0}; bins enabled = {1}; }
5967
coverpoint execute_cp { bins disabled = {0}; bins enabled = {1}; }
60-
61-
6268
coverpoint access_permit_cp { bins deny = {0}; bins permit = {1}; }
6369

6470
idx_X_access_type_X_read_X_write_X_execute_X_access_permit:
@@ -167,7 +173,6 @@ class ac_range_check_env_cov extends cip_base_env_cov #(.CFG_T(ac_range_check_en
167173
coverpoint bypass_cp { bins disabled = {0}; bins enabled = {1}; }
168174
endgroup : bypass_cg
169175

170-
171176
covergroup range_lock_cg;
172177
coverpoint idx_cp
173178
{
@@ -180,6 +185,82 @@ class ac_range_check_env_cov extends cip_base_env_cov #(.CFG_T(ac_range_check_en
180185
idx_X_enable_X_lock : cross idx_cp, range_en_cp, lock_idx_cp;
181186
endgroup : range_lock_cg
182187

188+
covergroup log_intr_cg;
189+
coverpoint log_enable_cp { bins disabled = {0}; bins enabled = {1}; }
190+
coverpoint log_written_cp { bins empty = {0}; bins written = {1}; }
191+
coverpoint deny_th_cp
192+
{
193+
bins low_range[] = {[0 : 5]};
194+
bins mid_range = {[6 : (2^DenyCountWidth)-7]};
195+
bins high_range[] = {[(2^DenyCountWidth)-6 : (2^DenyCountWidth)-1]};
196+
}
197+
coverpoint cnt_reached_cp { bins lesser = {0}; bins greater_or_equal = {1}; }
198+
coverpoint intr_state_cp { bins lesser = {0}; bins greater_or_equal = {1}; }
199+
200+
log_enable_X_log_written_X_deny_th_X_cnt_reached_X_intr_state :
201+
cross log_enable_cp, log_written_cp, deny_th_cp, cnt_reached_cp, intr_state_cp
202+
{
203+
// If logging is globally disabled, then all the fields should be empty
204+
ignore_bins empty_when_log_enable_is_not_set =
205+
log_enable_X_log_written_X_deny_th_X_cnt_reached_X_intr_state
206+
with (log_enable_cp == 0 && log_written_cp == 1);
207+
208+
// Interrupt should not be raised if deny_cnt < deny_cnt_threshold
209+
ignore_bins interrupt_when_cnt_not_reached =
210+
log_enable_X_log_written_X_deny_th_X_cnt_reached_X_intr_state
211+
with (intr_state_cp == 1 && cnt_reached_cp == 0);
212+
213+
// With log_enable = 1, the deny_cnt will never increase and we will
214+
// never see cnt_reached_cp = 1
215+
ignore_bins cnt_reached_for_log_disabled =
216+
log_enable_X_log_written_X_deny_th_X_cnt_reached_X_intr_state
217+
with (log_enable_cp == 0 && cnt_reached_cp == 1 && deny_th_cp != 0);
218+
219+
// log_written should only happen with cnt_reached
220+
ignore_bins no_log_written_when_cnt_reached =
221+
log_enable_X_log_written_X_deny_th_X_cnt_reached_X_intr_state
222+
with (log_written_cp == 0 && cnt_reached_cp == 1 && deny_th_cp != 0);
223+
224+
// For the case deny_threshold = 0, there are only two valid scenarios
225+
ignore_bins exclusive_deny_thr_0_scenario =
226+
log_enable_X_log_written_X_deny_th_X_cnt_reached_X_intr_state
227+
with (deny_th_cp == 0 && (cnt_reached_cp == 0 || intr_state_cp != log_written_cp));
228+
229+
// For the case deny_threshold = 1, there is one illegal scenario
230+
ignore_bins exclusive_deny_thr_1_scenario =
231+
log_enable_X_log_written_X_deny_th_X_cnt_reached_X_intr_state
232+
with (deny_th_cp == 1 && log_written_cp == 1 && log_enable_cp == 1
233+
&& cnt_reached_cp == 0 && intr_state_cp == 0);
234+
235+
// For the case of deny_threshold = 255, there is one illegal scenario
236+
ignore_bins exclusive_deny_thr_255_scenario =
237+
log_enable_X_log_written_X_deny_th_X_cnt_reached_X_intr_state
238+
with (deny_th_cp == 255 && log_written_cp == 1 && log_enable_cp == 1
239+
&& cnt_reached_cp == 1 && intr_state_cp == 1);
240+
}
241+
endgroup : log_intr_cg
242+
243+
covergroup log_denied_access_cg;
244+
coverpoint idx_cp {
245+
bins index[] = {[0:NUM_RANGES-1]};
246+
}
247+
248+
coverpoint log_denied_access_cp { bins disabled = {0}; bins enabled = {1}; }
249+
250+
idx_X_log_denied_access : cross idx_cp, log_denied_access_cp;
251+
endgroup : log_denied_access_cg
252+
253+
covergroup lock_logging_cg;
254+
coverpoint idx_cp {
255+
bins index[] = {[0:NUM_RANGES-1]};
256+
}
257+
258+
coverpoint log_denied_access_cp { bins disabled = {0}; bins enabled = {1}; }
259+
coverpoint lock_idx_cp { bins unlocked = {0}; bins enabled = {1}; }
260+
261+
idx_X_log_denied_X_lock : cross idx_cp, log_denied_access_cp, lock_idx_cp;
262+
endgroup : lock_logging_cg
263+
183264
// Standard SV/UVM methods
184265
extern function new(string name, uvm_component parent);
185266
extern function void build_phase(uvm_phase phase);
@@ -197,18 +278,25 @@ class ac_range_check_env_cov extends cip_base_env_cov #(.CFG_T(ac_range_check_en
197278
extern function void sample_all_index_miss_cg();
198279
extern function void sample_bypass_cg(bit bypass_en);
199280
extern function void sample_range_lock_cg(int idx, bit enable, bit lock);
281+
extern function void sample_log_intr_cg(bit log_enable, bit log_written, int deny_th,
282+
bit cnt_reached, bit intr_state);
283+
extern function void sample_log_denied_access_cg(int idx, bit log_denied_access);
284+
extern function void sample_lock_logging_cg(int idx, bit log_denied_access, bit lock);
200285
endclass : ac_range_check_env_cov
201286

202287

203288
function ac_range_check_env_cov::new(string name, uvm_component parent);
204289
super.new(name, parent);
205-
attr_perm_cg = new();
206-
racl_cg = new();
207-
range_cg = new();
208-
addr_match_cg = new();
209-
all_index_miss_cg = new();
210-
bypass_cg = new();
211-
range_lock_cg = new();
290+
attr_perm_cg = new();
291+
racl_cg = new();
292+
range_cg = new();
293+
addr_match_cg = new();
294+
all_index_miss_cg = new();
295+
bypass_cg = new();
296+
range_lock_cg = new();
297+
log_intr_cg = new();
298+
log_denied_access_cg = new();
299+
lock_logging_cg = new();
212300
endfunction : new
213301

214302
function void ac_range_check_env_cov::build_phase(uvm_phase phase);
@@ -279,3 +367,28 @@ function void ac_range_check_env_cov::sample_range_lock_cg(int idx, bit enable,
279367

280368
range_lock_cg.sample();
281369
endfunction : sample_range_lock_cg
370+
371+
function void ac_range_check_env_cov::sample_log_intr_cg(bit log_enable, bit log_written,
372+
int deny_th, bit cnt_reached,
373+
bit intr_state);
374+
this.log_enable_cp = log_enable;
375+
this.log_written_cp = log_written;
376+
this.deny_th_cp = deny_th;
377+
this.cnt_reached_cp = cnt_reached;
378+
this.intr_state_cp = intr_state;
379+
log_intr_cg.sample();
380+
endfunction : sample_log_intr_cg
381+
382+
function void ac_range_check_env_cov::sample_log_denied_access_cg(int idx, bit log_denied_access);
383+
this.idx_cp = idx;
384+
this.log_denied_access_cp = log_denied_access;
385+
log_denied_access_cg.sample();
386+
endfunction : sample_log_denied_access_cg
387+
388+
function void ac_range_check_env_cov::sample_lock_logging_cg(int idx,
389+
bit log_denied_access, bit lock);
390+
this.idx_cp = idx;
391+
this.log_denied_access_cp = log_denied_access;
392+
this.lock_idx_cp = lock;
393+
lock_logging_cg.sample();
394+
endfunction : sample_lock_logging_cg

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