[mlir][rocdl] Add s.sleep intrinsic (#147936)

Author: Hardcode84

mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td

@@ -251,6 +251,11 @@ def ROCDL_SWaitcntOp : ROCDL_ConcreteNonMemIntrOp<"s.waitcnt", [], 0, [0], ["bit
   let assemblyFormat = "attr-dict $bitfield";
 }
 
+def ROCDL_SSleepOp : ROCDL_ConcreteNonMemIntrOp<"s.sleep", [], 0, [0], ["count"]>,
+  Arguments<(ins I32Attr:$count)> {
+  let assemblyFormat = "attr-dict $count";
+}
+
 def ROCDL_SBarrierOp : ROCDL_ConcreteNonMemIntrOp<"s.barrier", [], 0> {
   let assemblyFormat = "attr-dict";
 }

mlir/test/Dialect/LLVMIR/rocdl.mlir

@@ -923,6 +923,13 @@ llvm.func @rocdl.s.waitcnt() {
   llvm.return
 }
 
+llvm.func @rocdl.s.sleep() {
+  // CHECK-LABEL: rocdl.s.sleep
+  // CHECK: rocdl.s.sleep 0
+  rocdl.s.sleep 0
+  llvm.return
+}
+
 llvm.func @rocdl.s.barrier() {
   // CHECK-LABEL: rocdl.s.barrier
   // CHECK: rocdl.s.barrier

mlir/test/Target/LLVMIR/rocdl.mlir

@@ -151,6 +151,13 @@ llvm.func @rocdl.s.waitcnt() {
   llvm.return
 }
 
+llvm.func @rocdl.s.sleep() {
+  // CHECK-LABEL: rocdl.s.sleep
+  // CHECK-NEXT: call void @llvm.amdgcn.s.sleep(i32 0)
+  rocdl.s.sleep 0
+  llvm.return
+}
+
 llvm.func @rocdl.s.barrier() {
   // CHECK-LABEL: rocdl.s.barrier
   // CHECK-NEXT: call void @llvm.amdgcn.s.barrier()