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AtomicExpand: Stop using report_fatal_error (#147300)
Emit a context error and delete the instruction. This allows removing the AMDGPU hack where some atomic libcalls are falsely added. NVPTX also later copied the same hack, so remove it there too. For now just emit the generic error, which is not good. It's missing any useful context information (despite taking the instruction). It's also confusing in the failed atomicrmw case, since it's reporting failure at the intermediate failed cmpxchg instead of the original atomicrmw.
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11 files changed

+107
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lines changed

‎llvm/include/llvm/IR/RuntimeLibcalls.td

Lines changed: 4 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1096,9 +1096,8 @@ def WindowsARM64ECSystemLibrary
10961096

10971097
def isAMDGPU : RuntimeLibcallPredicate<"TT.isAMDGPU()">;
10981098

1099-
// No calls, except for dummy atomic calls to avoid crashes.
1100-
def AMDGPUSystemLibrary
1101-
: SystemRuntimeLibrary<isAMDGPU, (add DefaultRuntimeLibcallImpls_atomic)>;
1099+
// No calls.
1100+
def AMDGPUSystemLibrary : SystemRuntimeLibrary<isAMDGPU, (add)>;
11021101

11031102
//===----------------------------------------------------------------------===//
11041103
// ARM Runtime Libcalls
@@ -1699,9 +1698,8 @@ def MSP430SystemLibrary
16991698

17001699
def isNVPTX : RuntimeLibcallPredicate<"TT.isNVPTX()">;
17011700

1702-
// No calls, except for dummy atomic calls to avoid crashes.
1703-
def NVPTXSystemLibrary
1704-
: SystemRuntimeLibrary<isNVPTX, (add DefaultRuntimeLibcallImpls_atomic)>;
1701+
// No calls.
1702+
def NVPTXSystemLibrary : SystemRuntimeLibrary<isNVPTX, (add)>;
17051703

17061704
//===----------------------------------------------------------------------===//
17071705
// PPC Runtime Libcalls

‎llvm/lib/CodeGen/AtomicExpandPass.cpp

Lines changed: 14 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -65,6 +65,17 @@ class AtomicExpandImpl {
6565
const DataLayout *DL = nullptr;
6666

6767
private:
68+
void handleFailure(Instruction &FailedInst, const Twine &Msg) const {
69+
LLVMContext &Ctx = FailedInst.getContext();
70+
71+
// TODO: Do not use generic error type.
72+
Ctx.emitError(&FailedInst, Msg);
73+
74+
if (!FailedInst.getType()->isVoidTy())
75+
FailedInst.replaceAllUsesWith(PoisonValue::get(FailedInst.getType()));
76+
FailedInst.eraseFromParent();
77+
}
78+
6879
bool bracketInstWithFences(Instruction *I, AtomicOrdering Order);
6980
IntegerType *getCorrespondingIntegerType(Type *T, const DataLayout &DL);
7081
LoadInst *convertAtomicLoadToIntegerType(LoadInst *LI);
@@ -1744,7 +1755,7 @@ void AtomicExpandImpl::expandAtomicLoadToLibcall(LoadInst *I) {
17441755
I, Size, I->getAlign(), I->getPointerOperand(), nullptr, nullptr,
17451756
I->getOrdering(), AtomicOrdering::NotAtomic, Libcalls);
17461757
if (!expanded)
1747-
report_fatal_error("expandAtomicOpToLibcall shouldn't fail for Load");
1758+
handleFailure(*I, "unsupported atomic load");
17481759
}
17491760

17501761
void AtomicExpandImpl::expandAtomicStoreToLibcall(StoreInst *I) {
@@ -1757,7 +1768,7 @@ void AtomicExpandImpl::expandAtomicStoreToLibcall(StoreInst *I) {
17571768
I, Size, I->getAlign(), I->getPointerOperand(), I->getValueOperand(),
17581769
nullptr, I->getOrdering(), AtomicOrdering::NotAtomic, Libcalls);
17591770
if (!expanded)
1760-
report_fatal_error("expandAtomicOpToLibcall shouldn't fail for Store");
1771+
handleFailure(*I, "unsupported atomic store");
17611772
}
17621773

17631774
void AtomicExpandImpl::expandAtomicCASToLibcall(AtomicCmpXchgInst *I) {
@@ -1772,7 +1783,7 @@ void AtomicExpandImpl::expandAtomicCASToLibcall(AtomicCmpXchgInst *I) {
17721783
I->getCompareOperand(), I->getSuccessOrdering(), I->getFailureOrdering(),
17731784
Libcalls);
17741785
if (!expanded)
1775-
report_fatal_error("expandAtomicOpToLibcall shouldn't fail for CAS");
1786+
handleFailure(*I, "unsupported cmpxchg");
17761787
}
17771788

17781789
static ArrayRef<RTLIB::Libcall> GetRMWLibcall(AtomicRMWInst::BinOp Op) {

‎llvm/test/CodeGen/AMDGPU/atomic-oversize.ll

Lines changed: 0 additions & 10 deletions
This file was deleted.

‎llvm/test/CodeGen/AMDGPU/unsupported-atomics.ll

Lines changed: 55 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,55 @@
1+
; RUN: not llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -filetype=null %s 2>&1 | FileCheck %s
2+
3+
; CHECK: error: unsupported atomic load
4+
define i128 @test_load_i128(ptr %p) nounwind {
5+
%ld = load atomic i128, ptr %p seq_cst, align 16
6+
ret i128 %ld
7+
}
8+
9+
; CHECK: error: unsupported atomic store
10+
define void @test_store_i128(ptr %p, i128 %val) nounwind {
11+
store atomic i128 %val, ptr %p seq_cst, align 16
12+
ret void
13+
}
14+
15+
; CHECK: error: unsupported cmpxchg
16+
define { i128, i1 } @cmpxchg_i128(ptr %p, i128 %cmp, i128 %val) nounwind {
17+
%ret = cmpxchg ptr %p, i128 %cmp, i128 %val seq_cst monotonic
18+
ret { i128, i1 } %ret
19+
}
20+
21+
; CHECK: error: unsupported cmpxchg
22+
define i128 @atomicrmw_xchg_i128(ptr %p, i128 %val) nounwind {
23+
%ret = atomicrmw xchg ptr %p, i128 %val seq_cst
24+
ret i128 %ret
25+
}
26+
27+
; CHECK: error: unsupported cmpxchg
28+
define i64 @atomicrmw_xchg_i64_align4(ptr %p, i64 %val) nounwind {
29+
%ret = atomicrmw xchg ptr %p, i64 %val seq_cst, align 4
30+
ret i64 %ret
31+
}
32+
33+
; CHECK: error: unsupported cmpxchg
34+
define double @atomicrmw_fadd_f64_align4(ptr %p, double %val) nounwind {
35+
%ret = atomicrmw fadd ptr %p, double %val seq_cst, align 4
36+
ret double %ret
37+
}
38+
39+
; CHECK: error: unsupported cmpxchg
40+
define fp128 @atomicrmw_fadd_f128_align4(ptr %p, fp128 %val) nounwind {
41+
%ret = atomicrmw fadd ptr %p, fp128 %val seq_cst, align 4
42+
ret fp128 %ret
43+
}
44+
45+
; CHECK: error: unsupported cmpxchg
46+
define fp128 @atomicrmw_fadd_f128(ptr %p, fp128 %val) nounwind {
47+
%ret = atomicrmw fadd ptr %p, fp128 %val seq_cst, align 16
48+
ret fp128 %ret
49+
}
50+
51+
; CHECK: error: unsupported cmpxchg
52+
define <2 x half> @test_atomicrmw_fadd_v2f16_global_agent_align2(ptr addrspace(1) %ptr, <2 x half> %value) {
53+
%res = atomicrmw fadd ptr addrspace(1) %ptr, <2 x half> %value syncscope("agent") seq_cst, align 2
54+
ret <2 x half> %res
55+
}

‎llvm/test/CodeGen/NVPTX/atomicrmw-expand.err.ll

Lines changed: 27 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,27 @@
1+
; RUN: not llc -mtriple=nvptx64 -mcpu=sm_30 -filetype=null %s 2>&1 | FileCheck %s
2+
3+
; CHECK: error: unsupported cmpxchg
4+
; CHECK: error: unsupported cmpxchg
5+
; CHECK: error: unsupported cmpxchg
6+
; CHECK: error: unsupported cmpxchg
7+
define void @bitwise_i128(ptr %0, i128 %1) {
8+
entry:
9+
%2 = atomicrmw and ptr %0, i128 %1 monotonic, align 16
10+
%3 = atomicrmw or ptr %0, i128 %1 monotonic, align 16
11+
%4 = atomicrmw xor ptr %0, i128 %1 monotonic, align 16
12+
%5 = atomicrmw xchg ptr %0, i128 %1 monotonic, align 16
13+
ret void
14+
}
15+
16+
; CHECK: error: unsupported cmpxchg
17+
; CHECK: error: unsupported cmpxchg
18+
; CHECK: error: unsupported cmpxchg
19+
; CHECK: error: unsupported cmpxchg
20+
define void @minmax_i128(ptr %0, i128 %1) {
21+
entry:
22+
%2 = atomicrmw min ptr %0, i128 %1 monotonic, align 16
23+
%3 = atomicrmw max ptr %0, i128 %1 monotonic, align 16
24+
%4 = atomicrmw umin ptr %0, i128 %1 monotonic, align 16
25+
%5 = atomicrmw umax ptr %0, i128 %1 monotonic, align 16
26+
ret void
27+
}

‎llvm/test/CodeGen/NVPTX/atomicrmw-expand.ll

Lines changed: 0 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -139,31 +139,3 @@ entry:
139139
%5 = atomicrmw umax ptr %0, i16 %1 monotonic, align 2
140140
ret void
141141
}
142-
143-
; CHECK-LABEL: bitwise_i128
144-
define void @bitwise_i128(ptr %0, i128 %1) {
145-
entry:
146-
; ALL: __atomic_fetch_and_16
147-
%2 = atomicrmw and ptr %0, i128 %1 monotonic, align 16
148-
; ALL: __atomic_fetch_or_16
149-
%3 = atomicrmw or ptr %0, i128 %1 monotonic, align 16
150-
; ALL: __atomic_fetch_xor_16
151-
%4 = atomicrmw xor ptr %0, i128 %1 monotonic, align 16
152-
; ALL: __atomic_exchange_16
153-
%5 = atomicrmw xchg ptr %0, i128 %1 monotonic, align 16
154-
ret void
155-
}
156-
157-
; CHECK-LABEL: minmax_i128
158-
define void @minmax_i128(ptr %0, i128 %1) {
159-
entry:
160-
; ALL: __atomic_compare_exchange_16
161-
%2 = atomicrmw min ptr %0, i128 %1 monotonic, align 16
162-
; ALL: __atomic_compare_exchange_16
163-
%3 = atomicrmw max ptr %0, i128 %1 monotonic, align 16
164-
; ALL: __atomic_compare_exchange_16
165-
%4 = atomicrmw umin ptr %0, i128 %1 monotonic, align 16
166-
; ALL: __atomic_compare_exchange_16
167-
%5 = atomicrmw umax ptr %0, i128 %1 monotonic, align 16
168-
ret void
169-
}

‎llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-fp128.ll

Lines changed: 0 additions & 122 deletions
This file was deleted.

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