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AArch64MCCodeEmitter: Set PCRel at fixup creation
Avoid reliance on the MCAssembler::evaluateFixup workaround checking MCFixupKindInfo::FKF_IsPCRel. Remove discouraged MCFixupKind uses.
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+18
-36
lines changed

1 file changed

+18
-36
lines changed

llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp

Lines changed: 18 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -269,14 +269,11 @@ AArch64MCCodeEmitter::getAdrLabelOpValue(const MCInst &MI, unsigned OpIdx,
269269
assert(MO.isExpr() && "Unexpected target type!");
270270
const MCExpr *Expr = MO.getExpr();
271271

272-
MCFixupKind Kind = MI.getOpcode() == AArch64::ADR
273-
? MCFixupKind(AArch64::fixup_aarch64_pcrel_adr_imm21)
274-
: MCFixupKind(AArch64::fixup_aarch64_pcrel_adrp_imm21);
275-
Fixups.push_back(MCFixup::create(0, Expr, Kind));
276-
272+
unsigned Kind = MI.getOpcode() == AArch64::ADR
273+
? AArch64::fixup_aarch64_pcrel_adr_imm21
274+
: AArch64::fixup_aarch64_pcrel_adrp_imm21;
275+
Fixups.push_back(MCFixup::create(0, Expr, Kind, true));
277276
MCNumFixups += 1;
278-
279-
// All of the information is in the fixup.
280277
return 0;
281278
}
282279

@@ -329,12 +326,9 @@ uint32_t AArch64MCCodeEmitter::getCondBranchTargetOpValue(
329326
return MO.getImm();
330327
assert(MO.isExpr() && "Unexpected target type!");
331328

332-
MCFixupKind Kind = MCFixupKind(AArch64::fixup_aarch64_pcrel_branch19);
333-
Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind));
334-
329+
Fixups.push_back(MCFixup::create(
330+
0, MO.getExpr(), AArch64::fixup_aarch64_pcrel_branch19, true));
335331
++MCNumFixups;
336-
337-
// All of the information is in the fixup.
338332
return 0;
339333
}
340334

@@ -350,12 +344,9 @@ uint32_t AArch64MCCodeEmitter::getCondCompBranchTargetOpValue(
350344
return MO.getImm();
351345
assert(MO.isExpr() && "Unexpected target type!");
352346

353-
MCFixupKind Kind = MCFixupKind(AArch64::fixup_aarch64_pcrel_branch9);
354-
Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind));
355-
347+
Fixups.push_back(MCFixup::create(0, MO.getExpr(),
348+
AArch64::fixup_aarch64_pcrel_branch9, true));
356349
++MCNumFixups;
357-
358-
// All of the information is in the fixup.
359350
return 0;
360351
}
361352

@@ -373,12 +364,9 @@ AArch64MCCodeEmitter::getPAuthPCRelOpValue(const MCInst &MI, unsigned OpIdx,
373364
return -(MO.getImm());
374365
assert(MO.isExpr() && "Unexpected target type!");
375366

376-
MCFixupKind Kind = MCFixupKind(AArch64::fixup_aarch64_pcrel_branch16);
377-
Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind));
378-
367+
Fixups.push_back(MCFixup::create(
368+
0, MO.getExpr(), AArch64::fixup_aarch64_pcrel_branch16, true));
379369
++MCNumFixups;
380-
381-
// All of the information is in the fixup.
382370
return 0;
383371
}
384372

@@ -395,12 +383,9 @@ AArch64MCCodeEmitter::getLoadLiteralOpValue(const MCInst &MI, unsigned OpIdx,
395383
return MO.getImm();
396384
assert(MO.isExpr() && "Unexpected target type!");
397385

398-
MCFixupKind Kind = MCFixupKind(AArch64::fixup_aarch64_ldr_pcrel_imm19);
399-
Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind));
400-
386+
Fixups.push_back(MCFixup::create(
387+
0, MO.getExpr(), AArch64::fixup_aarch64_ldr_pcrel_imm19, true));
401388
++MCNumFixups;
402-
403-
// All of the information is in the fixup.
404389
return 0;
405390
}
406391

@@ -443,12 +428,9 @@ uint32_t AArch64MCCodeEmitter::getTestBranchTargetOpValue(
443428
return MO.getImm();
444429
assert(MO.isExpr() && "Unexpected ADR target type!");
445430

446-
MCFixupKind Kind = MCFixupKind(AArch64::fixup_aarch64_pcrel_branch14);
447-
Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind));
448-
431+
Fixups.push_back(MCFixup::create(
432+
0, MO.getExpr(), AArch64::fixup_aarch64_pcrel_branch14, true));
449433
++MCNumFixups;
450-
451-
// All of the information is in the fixup.
452434
return 0;
453435
}
454436

@@ -465,10 +447,10 @@ AArch64MCCodeEmitter::getBranchTargetOpValue(const MCInst &MI, unsigned OpIdx,
465447
return MO.getImm();
466448
assert(MO.isExpr() && "Unexpected ADR target type!");
467449

468-
MCFixupKind Kind = MI.getOpcode() == AArch64::BL
469-
? MCFixupKind(AArch64::fixup_aarch64_pcrel_call26)
470-
: MCFixupKind(AArch64::fixup_aarch64_pcrel_branch26);
471-
Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind));
450+
unsigned Kind = MI.getOpcode() == AArch64::BL
451+
? AArch64::fixup_aarch64_pcrel_call26
452+
: AArch64::fixup_aarch64_pcrel_branch26;
453+
Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, true));
472454

473455
++MCNumFixups;
474456

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