@@ -219,10 +219,10 @@ class RegAllocFastImpl {
219
219
// / Stores assigned virtual registers present in the bundle MI.
220
220
DenseMap<Register, LiveReg> BundleVirtRegsMap;
221
221
222
- DenseMap<unsigned , SmallVector<MachineOperand *, 2 >> LiveDbgValueMap;
222
+ DenseMap<Register , SmallVector<MachineOperand *, 2 >> LiveDbgValueMap;
223
223
// / List of DBG_VALUE that we encountered without the vreg being assigned
224
224
// / because they were placed after the last use of the vreg.
225
- DenseMap<unsigned , SmallVector<MachineInstr *, 1 >> DanglingDbgValues;
225
+ DenseMap<Register , SmallVector<MachineInstr *, 1 >> DanglingDbgValues;
226
226
227
227
// / Has a bit set for every virtual register for which it was determined
228
228
// / that it is alive across blocks.
@@ -276,7 +276,7 @@ class RegAllocFastImpl {
276
276
InstrPosIndexes PosIndexes;
277
277
278
278
void setPhysRegState (MCRegister PhysReg, unsigned NewState);
279
- bool isPhysRegFree (MCPhysReg PhysReg) const ;
279
+ bool isPhysRegFree (MCRegister PhysReg) const ;
280
280
281
281
// / Mark a physreg as used in this instruction.
282
282
void markRegUsedInInstr (MCPhysReg PhysReg) {
@@ -285,14 +285,14 @@ class RegAllocFastImpl {
285
285
}
286
286
287
287
// Check if physreg is clobbered by instruction's regmask(s).
288
- bool isClobberedByRegMasks (MCPhysReg PhysReg) const {
288
+ bool isClobberedByRegMasks (MCRegister PhysReg) const {
289
289
return llvm::any_of (RegMasks, [PhysReg](const uint32_t *Mask) {
290
290
return MachineOperand::clobbersPhysReg (Mask, PhysReg);
291
291
});
292
292
}
293
293
294
294
// / Check if a physreg or any of its aliases are used in this instruction.
295
- bool isRegUsedInInstr (MCPhysReg PhysReg, bool LookAtPhysRegUses) const {
295
+ bool isRegUsedInInstr (MCRegister PhysReg, bool LookAtPhysRegUses) const {
296
296
if (LookAtPhysRegUses && isClobberedByRegMasks (PhysReg))
297
297
return true ;
298
298
for (MCRegUnit Unit : TRI->regunits (PhysReg))
@@ -303,15 +303,15 @@ class RegAllocFastImpl {
303
303
304
304
// / Mark physical register as being used in a register use operand.
305
305
// / This is only used by the special livethrough handling code.
306
- void markPhysRegUsedInInstr (MCPhysReg PhysReg) {
306
+ void markPhysRegUsedInInstr (MCRegister PhysReg) {
307
307
for (MCRegUnit Unit : TRI->regunits (PhysReg)) {
308
308
assert (UsedInInstr[Unit] <= InstrGen && " non-phys use before phys use?" );
309
309
UsedInInstr[Unit] = InstrGen;
310
310
}
311
311
}
312
312
313
313
// / Remove mark of physical register being used in the instruction.
314
- void unmarkRegUsedInInstr (MCPhysReg PhysReg) {
314
+ void unmarkRegUsedInInstr (MCRegister PhysReg) {
315
315
for (MCRegUnit Unit : TRI->regunits (PhysReg))
316
316
UsedInInstr[Unit] = 0 ;
317
317
}
@@ -340,10 +340,10 @@ class RegAllocFastImpl {
340
340
void handleDebugValue (MachineInstr &MI);
341
341
void handleBundle (MachineInstr &MI);
342
342
343
- bool usePhysReg (MachineInstr &MI, MCPhysReg PhysReg);
344
- bool definePhysReg (MachineInstr &MI, MCPhysReg PhysReg);
345
- bool displacePhysReg (MachineInstr &MI, MCPhysReg PhysReg);
346
- void freePhysReg (MCPhysReg PhysReg);
343
+ bool usePhysReg (MachineInstr &MI, MCRegister PhysReg);
344
+ bool definePhysReg (MachineInstr &MI, MCRegister PhysReg);
345
+ bool displacePhysReg (MachineInstr &MI, MCRegister PhysReg);
346
+ void freePhysReg (MCRegister PhysReg);
347
347
348
348
unsigned calcSpillCost (MCPhysReg PhysReg) const ;
349
349
@@ -355,12 +355,12 @@ class RegAllocFastImpl {
355
355
return LiveVirtRegs.find (VirtReg.virtRegIndex ());
356
356
}
357
357
358
- void assignVirtToPhysReg (MachineInstr &MI, LiveReg &, MCPhysReg PhysReg);
358
+ void assignVirtToPhysReg (MachineInstr &MI, LiveReg &, MCRegister PhysReg);
359
359
void allocVirtReg (MachineInstr &MI, LiveReg &LR, Register Hint,
360
360
bool LookAtPhysRegUses = false );
361
361
void allocVirtRegUndef (MachineOperand &MO);
362
362
void assignDanglingDebugValues (MachineInstr &Def, Register VirtReg,
363
- MCPhysReg Reg);
363
+ MCRegister Reg);
364
364
bool defineLiveThroughVirtReg (MachineInstr &MI, unsigned OpNum,
365
365
Register VirtReg);
366
366
bool defineVirtReg (MachineInstr &MI, unsigned OpNum, Register VirtReg,
@@ -454,7 +454,7 @@ void RegAllocFastImpl::setPhysRegState(MCRegister PhysReg, unsigned NewState) {
454
454
RegUnitStates[Unit] = NewState;
455
455
}
456
456
457
- bool RegAllocFastImpl::isPhysRegFree (MCPhysReg PhysReg) const {
457
+ bool RegAllocFastImpl::isPhysRegFree (MCRegister PhysReg) const {
458
458
for (MCRegUnit Unit : TRI->regunits (PhysReg)) {
459
459
if (RegUnitStates[Unit] != regFree)
460
460
return false ;
@@ -709,15 +709,15 @@ void RegAllocFastImpl::reloadAtBegin(MachineBasicBlock &MBB) {
709
709
// / Handle the direct use of a physical register. Check that the register is
710
710
// / not used by a virtreg. Kill the physreg, marking it free. This may add
711
711
// / implicit kills to MO->getParent() and invalidate MO.
712
- bool RegAllocFastImpl::usePhysReg (MachineInstr &MI, MCPhysReg Reg) {
712
+ bool RegAllocFastImpl::usePhysReg (MachineInstr &MI, MCRegister Reg) {
713
713
assert (Register::isPhysicalRegister (Reg) && " expected physreg" );
714
714
bool displacedAny = displacePhysReg (MI, Reg);
715
715
setPhysRegState (Reg, regPreAssigned);
716
716
markRegUsedInInstr (Reg);
717
717
return displacedAny;
718
718
}
719
719
720
- bool RegAllocFastImpl::definePhysReg (MachineInstr &MI, MCPhysReg Reg) {
720
+ bool RegAllocFastImpl::definePhysReg (MachineInstr &MI, MCRegister Reg) {
721
721
bool displacedAny = displacePhysReg (MI, Reg);
722
722
setPhysRegState (Reg, regPreAssigned);
723
723
return displacedAny;
@@ -726,7 +726,7 @@ bool RegAllocFastImpl::definePhysReg(MachineInstr &MI, MCPhysReg Reg) {
726
726
// / Mark PhysReg as reserved or free after spilling any virtregs. This is very
727
727
// / similar to defineVirtReg except the physreg is reserved instead of
728
728
// / allocated.
729
- bool RegAllocFastImpl::displacePhysReg (MachineInstr &MI, MCPhysReg PhysReg) {
729
+ bool RegAllocFastImpl::displacePhysReg (MachineInstr &MI, MCRegister PhysReg) {
730
730
bool displacedAny = false ;
731
731
732
732
for (MCRegUnit Unit : TRI->regunits (PhysReg)) {
@@ -755,7 +755,7 @@ bool RegAllocFastImpl::displacePhysReg(MachineInstr &MI, MCPhysReg PhysReg) {
755
755
return displacedAny;
756
756
}
757
757
758
- void RegAllocFastImpl::freePhysReg (MCPhysReg PhysReg) {
758
+ void RegAllocFastImpl::freePhysReg (MCRegister PhysReg) {
759
759
LLVM_DEBUG (dbgs () << " Freeing " << printReg (PhysReg, TRI) << ' :' );
760
760
761
761
MCRegUnit FirstUnit = *TRI->regunits (PhysReg).begin ();
@@ -803,7 +803,7 @@ unsigned RegAllocFastImpl::calcSpillCost(MCPhysReg PhysReg) const {
803
803
804
804
void RegAllocFastImpl::assignDanglingDebugValues (MachineInstr &Definition,
805
805
Register VirtReg,
806
- MCPhysReg Reg) {
806
+ MCRegister Reg) {
807
807
auto UDBGValIter = DanglingDbgValues.find (VirtReg);
808
808
if (UDBGValIter == DanglingDbgValues.end ())
809
809
return ;
@@ -840,14 +840,14 @@ void RegAllocFastImpl::assignDanglingDebugValues(MachineInstr &Definition,
840
840
// / proper container for VirtReg now. The physical register must not be used
841
841
// / for anything else when this is called.
842
842
void RegAllocFastImpl::assignVirtToPhysReg (MachineInstr &AtMI, LiveReg &LR,
843
- MCPhysReg PhysReg) {
843
+ MCRegister PhysReg) {
844
844
Register VirtReg = LR.VirtReg ;
845
845
LLVM_DEBUG (dbgs () << " Assigning " << printReg (VirtReg, TRI) << " to "
846
846
<< printReg (PhysReg, TRI) << ' \n ' );
847
847
assert (LR.PhysReg == 0 && " Already assigned a physreg" );
848
848
assert (PhysReg != 0 && " Trying to assign no register" );
849
849
LR.PhysReg = PhysReg;
850
- setPhysRegState (PhysReg, VirtReg);
850
+ setPhysRegState (PhysReg, VirtReg. id () );
851
851
852
852
assignDanglingDebugValues (AtMI, VirtReg, PhysReg);
853
853
}
0 commit comments