Skip to content

Commit e3025c9

Browse files
committed
RISCV: Rename RISCVMCExpr::VK_ to RISCV::S_
Prepare for removing RISCVMCExpr. Adopt the newer naming convention (S_) used by AMDGPU/WebAssembly/VE/M68k/PowerPC.
1 parent e448c3e commit e3025c9

File tree

5 files changed

+55
-53
lines changed

5 files changed

+55
-53
lines changed

llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp

Lines changed: 21 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -544,9 +544,9 @@ struct RISCVOperand final : public MCParsedAsmOperand {
544544
if (evaluateConstantImm(getImm(), Imm))
545545
return isShiftedInt<N - 1, 1>(fixImmediateForRV32(Imm, isRV64Imm()));
546546

547-
RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
547+
RISCVMCExpr::Specifier VK = RISCV::S_None;
548548
return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
549-
VK == RISCVMCExpr::VK_None;
549+
VK == RISCV::S_None;
550550
}
551551

552552
// True if operand is a symbol with no modifiers, or a constant with no
@@ -559,9 +559,9 @@ struct RISCVOperand final : public MCParsedAsmOperand {
559559
if (evaluateConstantImm(getImm(), Imm))
560560
return isInt<N>(fixImmediateForRV32(Imm, isRV64Imm()));
561561

562-
RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
562+
RISCVMCExpr::Specifier VK = RISCV::S_None;
563563
return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
564-
VK == RISCVMCExpr::VK_None;
564+
VK == RISCV::S_None;
565565
}
566566

567567
// Predicate methods for AsmOperands defined in RISCVInstrInfo.td
@@ -572,9 +572,9 @@ struct RISCVOperand final : public MCParsedAsmOperand {
572572
if (!isImm() || evaluateConstantImm(getImm(), Imm))
573573
return false;
574574

575-
RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
575+
RISCVMCExpr::Specifier VK = RISCV::S_None;
576576
return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
577-
VK == RISCVMCExpr::VK_None;
577+
VK == RISCV::S_None;
578578
}
579579

580580
bool isCallSymbol() const {
@@ -583,7 +583,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
583583
if (!isImm() || evaluateConstantImm(getImm(), Imm))
584584
return false;
585585

586-
RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
586+
RISCVMCExpr::Specifier VK = RISCV::S_None;
587587
return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
588588
VK == ELF::R_RISCV_CALL_PLT;
589589
}
@@ -594,7 +594,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
594594
if (!isImm() || evaluateConstantImm(getImm(), Imm))
595595
return false;
596596

597-
RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
597+
RISCVMCExpr::Specifier VK = RISCV::S_None;
598598
return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
599599
VK == ELF::R_RISCV_CALL_PLT;
600600
}
@@ -605,7 +605,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
605605
if (!isImm() || evaluateConstantImm(getImm(), Imm))
606606
return false;
607607

608-
RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
608+
RISCVMCExpr::Specifier VK = RISCV::S_None;
609609
return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
610610
VK == ELF::R_RISCV_TPREL_ADD;
611611
}
@@ -616,7 +616,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
616616
if (!isImm() || evaluateConstantImm(getImm(), Imm))
617617
return false;
618618

619-
RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
619+
RISCVMCExpr::Specifier VK = RISCV::S_None;
620620
return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
621621
VK == ELF::R_RISCV_TLSDESC_CALL;
622622
}
@@ -870,11 +870,10 @@ struct RISCVOperand final : public MCParsedAsmOperand {
870870
if (evaluateConstantImm(getImm(), Imm))
871871
return isInt<12>(fixImmediateForRV32(Imm, isRV64Imm()));
872872

873-
RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
873+
RISCVMCExpr::Specifier VK = RISCV::S_None;
874874
return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
875-
(VK == RISCVMCExpr::VK_LO || VK == RISCVMCExpr::VK_PCREL_LO ||
876-
VK == RISCVMCExpr::VK_TPREL_LO ||
877-
VK == ELF::R_RISCV_TLSDESC_LOAD_LO12 ||
875+
(VK == RISCV::S_LO || VK == RISCV::S_PCREL_LO ||
876+
VK == RISCV::S_TPREL_LO || VK == ELF::R_RISCV_TLSDESC_LOAD_LO12 ||
878877
VK == ELF::R_RISCV_TLSDESC_ADD_LO12);
879878
}
880879

@@ -903,9 +902,9 @@ struct RISCVOperand final : public MCParsedAsmOperand {
903902
if (evaluateConstantImm(getImm(), Imm))
904903
return isInt<20>(fixImmediateForRV32(Imm, isRV64Imm()));
905904

906-
RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
905+
RISCVMCExpr::Specifier VK = RISCV::S_None;
907906
return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
908-
VK == RISCVMCExpr::VK_QC_ABS20;
907+
VK == RISCV::S_QC_ABS20;
909908
}
910909

911910
bool isUImm20LUI() const {
@@ -916,7 +915,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
916915
if (evaluateConstantImm(getImm(), Imm))
917916
return isUInt<20>(Imm);
918917

919-
RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
918+
RISCVMCExpr::Specifier VK = RISCV::S_None;
920919
return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
921920
(VK == ELF::R_RISCV_HI20 || VK == ELF::R_RISCV_TPREL_HI20);
922921
}
@@ -929,7 +928,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
929928
if (evaluateConstantImm(getImm(), Imm))
930929
return isUInt<20>(Imm);
931930

932-
RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
931+
RISCVMCExpr::Specifier VK = RISCV::S_None;
933932
return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
934933
(VK == ELF::R_RISCV_PCREL_HI20 || VK == ELF::R_RISCV_GOT_HI20 ||
935934
VK == ELF::R_RISCV_TLS_GOT_HI20 || VK == ELF::R_RISCV_TLS_GD_HI20 ||
@@ -2920,7 +2919,7 @@ bool RISCVAsmParser::parseInstruction(ParseInstructionInfo &Info,
29202919

29212920
bool RISCVAsmParser::classifySymbolRef(const MCExpr *Expr,
29222921
RISCVMCExpr::Specifier &Kind) {
2923-
Kind = RISCVMCExpr::VK_None;
2922+
Kind = RISCV::S_None;
29242923

29252924
if (const RISCVMCExpr *RE = dyn_cast<RISCVMCExpr>(Expr)) {
29262925
Kind = RE->getSpecifier();
@@ -2929,14 +2928,14 @@ bool RISCVAsmParser::classifySymbolRef(const MCExpr *Expr,
29292928

29302929
MCValue Res;
29312930
if (Expr->evaluateAsRelocatable(Res, nullptr))
2932-
return Res.getSpecifier() == RISCVMCExpr::VK_None;
2931+
return Res.getSpecifier() == RISCV::S_None;
29332932
return false;
29342933
}
29352934

29362935
bool RISCVAsmParser::isSymbolDiff(const MCExpr *Expr) {
29372936
MCValue Res;
29382937
if (Expr->evaluateAsRelocatable(Res, nullptr)) {
2939-
return Res.getSpecifier() == RISCVMCExpr::VK_None && Res.getAddSym() &&
2938+
return Res.getSpecifier() == RISCV::S_None && Res.getAddSym() &&
29402939
Res.getSubSym();
29412940
}
29422941
return false;
@@ -3451,7 +3450,7 @@ void RISCVAsmParser::emitAuipcInstPair(MCRegister DestReg, MCRegister TmpReg,
34513450
MCInstBuilder(RISCV::AUIPC).addReg(TmpReg).addExpr(SymbolHi));
34523451

34533452
const MCExpr *RefToLinkTmpLabel = RISCVMCExpr::create(
3454-
MCSymbolRefExpr::create(TmpLabel, Ctx), RISCVMCExpr::VK_PCREL_LO, Ctx);
3453+
MCSymbolRefExpr::create(TmpLabel, Ctx), RISCV::S_PCREL_LO, Ctx);
34553454

34563455
emitToStreamer(Out, MCInstBuilder(SecondOpcode)
34573456
.addReg(DestReg)

llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -580,7 +580,7 @@ uint64_t RISCVMCCodeEmitter::getImmOpValue(const MCInst &MI, unsigned OpNo,
580580
// encounter it here is an error.
581581
llvm_unreachable(
582582
"ELF::R_RISCV_TPREL_ADD should not represent an instruction operand");
583-
case RISCVMCExpr::VK_LO:
583+
case RISCV::S_LO:
584584
if (MIFrm == RISCVII::InstFormatI)
585585
FixupKind = RISCV::fixup_riscv_lo12_i;
586586
else if (MIFrm == RISCVII::InstFormatS)
@@ -593,7 +593,7 @@ uint64_t RISCVMCCodeEmitter::getImmOpValue(const MCInst &MI, unsigned OpNo,
593593
FixupKind = RISCV::fixup_riscv_hi20;
594594
RelaxCandidate = true;
595595
break;
596-
case RISCVMCExpr::VK_PCREL_LO:
596+
case RISCV::S_PCREL_LO:
597597
if (MIFrm == RISCVII::InstFormatI)
598598
FixupKind = RISCV::fixup_riscv_pcrel_lo12_i;
599599
else if (MIFrm == RISCVII::InstFormatS)
@@ -606,7 +606,7 @@ uint64_t RISCVMCCodeEmitter::getImmOpValue(const MCInst &MI, unsigned OpNo,
606606
FixupKind = RISCV::fixup_riscv_pcrel_hi20;
607607
RelaxCandidate = true;
608608
break;
609-
case RISCVMCExpr::VK_TPREL_LO:
609+
case RISCV::S_TPREL_LO:
610610
if (MIFrm == RISCVII::InstFormatI)
611611
FixupKind = ELF::R_RISCV_TPREL_LO12_I;
612612
else if (MIFrm == RISCVII::InstFormatS)
@@ -622,7 +622,7 @@ uint64_t RISCVMCCodeEmitter::getImmOpValue(const MCInst &MI, unsigned OpNo,
622622
FixupKind = RISCV::fixup_riscv_call_plt;
623623
RelaxCandidate = true;
624624
break;
625-
case RISCVMCExpr::VK_QC_ABS20:
625+
case RISCV::S_QC_ABS20:
626626
FixupKind = RISCV::fixup_riscv_qc_abs20_u;
627627
RelaxCandidate = true;
628628
break;

llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -33,7 +33,7 @@ const RISCVMCExpr *RISCVMCExpr::create(const MCExpr *Expr, Specifier S,
3333

3434
void RISCVMCExpr::printImpl(raw_ostream &OS, const MCAsmInfo *MAI) const {
3535
Specifier S = getSpecifier();
36-
bool HasVariant = S != VK_None && S != ELF::R_RISCV_CALL_PLT;
36+
bool HasVariant = S != RISCV::S_None && S != ELF::R_RISCV_CALL_PLT;
3737

3838
if (HasVariant)
3939
OS << '%' << getSpecifierName(S) << '(';
@@ -90,12 +90,12 @@ const MCFixup *RISCVMCExpr::getPCRelHiFixup(const MCFragment **DFOut) const {
9090
std::optional<RISCVMCExpr::Specifier>
9191
RISCVMCExpr::getSpecifierForName(StringRef name) {
9292
return StringSwitch<std::optional<RISCVMCExpr::Specifier>>(name)
93-
.Case("lo", VK_LO)
93+
.Case("lo", RISCV::S_LO)
9494
.Case("hi", ELF::R_RISCV_HI20)
95-
.Case("pcrel_lo", VK_PCREL_LO)
95+
.Case("pcrel_lo", RISCV::S_PCREL_LO)
9696
.Case("pcrel_hi", ELF::R_RISCV_PCREL_HI20)
9797
.Case("got_pcrel_hi", ELF::R_RISCV_GOT_HI20)
98-
.Case("tprel_lo", VK_TPREL_LO)
98+
.Case("tprel_lo", RISCV::S_TPREL_LO)
9999
.Case("tprel_hi", ELF::R_RISCV_TPREL_HI20)
100100
.Case("tprel_add", ELF::R_RISCV_TPREL_ADD)
101101
.Case("tls_ie_pcrel_hi", ELF::R_RISCV_TLS_GOT_HI20)
@@ -104,7 +104,7 @@ RISCVMCExpr::getSpecifierForName(StringRef name) {
104104
.Case("tlsdesc_load_lo", ELF::R_RISCV_TLSDESC_LOAD_LO12)
105105
.Case("tlsdesc_add_lo", ELF::R_RISCV_TLSDESC_ADD_LO12)
106106
.Case("tlsdesc_call", ELF::R_RISCV_TLSDESC_CALL)
107-
.Case("qc.abs20", VK_QC_ABS20)
107+
.Case("qc.abs20", RISCV::S_QC_ABS20)
108108
// Used in data directives
109109
.Case("pltpcrel", ELF::R_RISCV_PLT32)
110110
.Case("gotpcrel", ELF::R_RISCV_GOT32_PCREL)
@@ -113,19 +113,19 @@ RISCVMCExpr::getSpecifierForName(StringRef name) {
113113

114114
StringRef RISCVMCExpr::getSpecifierName(Specifier S) {
115115
switch (S) {
116-
case VK_None:
116+
case RISCV::S_None:
117117
llvm_unreachable("not used as %specifier()");
118-
case VK_LO:
118+
case RISCV::S_LO:
119119
return "lo";
120120
case ELF::R_RISCV_HI20:
121121
return "hi";
122-
case VK_PCREL_LO:
122+
case RISCV::S_PCREL_LO:
123123
return "pcrel_lo";
124124
case ELF::R_RISCV_PCREL_HI20:
125125
return "pcrel_hi";
126126
case ELF::R_RISCV_GOT_HI20:
127127
return "got_pcrel_hi";
128-
case VK_TPREL_LO:
128+
case RISCV::S_TPREL_LO:
129129
return "tprel_lo";
130130
case ELF::R_RISCV_TPREL_HI20:
131131
return "tprel_hi";
@@ -151,7 +151,7 @@ StringRef RISCVMCExpr::getSpecifierName(Specifier S) {
151151
return "gotpcrel";
152152
case ELF::R_RISCV_PLT32:
153153
return "pltpcrel";
154-
case VK_QC_ABS20:
154+
case RISCV::S_QC_ABS20:
155155
return "qc.abs20";
156156
}
157157
llvm_unreachable("Invalid ELF symbol kind");

llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h

Lines changed: 15 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -24,18 +24,6 @@ class StringRef;
2424
class RISCVMCExpr : public MCSpecifierExpr {
2525
public:
2626
using Specifier = uint16_t;
27-
// Specifiers mapping to relocation types below FirstTargetFixupKind are
28-
// encoded literally, with these exceptions:
29-
enum {
30-
VK_None,
31-
// Specifiers mapping to distinct relocation types.
32-
VK_LO = FirstTargetFixupKind,
33-
VK_PCREL_LO,
34-
VK_TPREL_LO,
35-
// Vendor-specific relocation types might conflict across vendors.
36-
// Refer to them using Specifier constants.
37-
VK_QC_ABS20,
38-
};
3927

4028
private:
4129
explicit RISCVMCExpr(const MCExpr *Expr, Specifier S)
@@ -57,6 +45,21 @@ class RISCVMCExpr : public MCSpecifierExpr {
5745
static std::optional<Specifier> getSpecifierForName(StringRef name);
5846
static StringRef getSpecifierName(Specifier Kind);
5947
};
48+
49+
namespace RISCV {
50+
// Specifiers mapping to relocation types below FirstTargetFixupKind are
51+
// encoded literally, with these exceptions:
52+
enum Specifier {
53+
S_None,
54+
// Specifiers mapping to distinct relocation types.
55+
S_LO = FirstTargetFixupKind,
56+
S_PCREL_LO,
57+
S_TPREL_LO,
58+
// Vendor-specific relocation types might conflict across vendors.
59+
// Refer to them using Specifier constants.
60+
S_QC_ABS20,
61+
};
62+
} // namespace RISCV
6063
} // end namespace llvm.
6164

6265
#endif

llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -963,19 +963,19 @@ static MCOperand lowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym,
963963
default:
964964
llvm_unreachable("Unknown target flag on GV operand");
965965
case RISCVII::MO_None:
966-
Kind = RISCVMCExpr::VK_None;
966+
Kind = RISCV::S_None;
967967
break;
968968
case RISCVII::MO_CALL:
969969
Kind = ELF::R_RISCV_CALL_PLT;
970970
break;
971971
case RISCVII::MO_LO:
972-
Kind = RISCVMCExpr::VK_LO;
972+
Kind = RISCV::S_LO;
973973
break;
974974
case RISCVII::MO_HI:
975975
Kind = ELF::R_RISCV_HI20;
976976
break;
977977
case RISCVII::MO_PCREL_LO:
978-
Kind = RISCVMCExpr::VK_PCREL_LO;
978+
Kind = RISCV::S_PCREL_LO;
979979
break;
980980
case RISCVII::MO_PCREL_HI:
981981
Kind = ELF::R_RISCV_PCREL_HI20;
@@ -984,7 +984,7 @@ static MCOperand lowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym,
984984
Kind = ELF::R_RISCV_GOT_HI20;
985985
break;
986986
case RISCVII::MO_TPREL_LO:
987-
Kind = RISCVMCExpr::VK_TPREL_LO;
987+
Kind = RISCV::S_TPREL_LO;
988988
break;
989989
case RISCVII::MO_TPREL_HI:
990990
Kind = ELF::R_RISCV_TPREL_HI20;
@@ -1018,7 +1018,7 @@ static MCOperand lowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym,
10181018
ME = MCBinaryExpr::createAdd(
10191019
ME, MCConstantExpr::create(MO.getOffset(), Ctx), Ctx);
10201020

1021-
if (Kind != RISCVMCExpr::VK_None)
1021+
if (Kind != RISCV::S_None)
10221022
ME = RISCVMCExpr::create(ME, Kind, Ctx);
10231023
return MCOperand::createExpr(ME);
10241024
}

0 commit comments

Comments
 (0)