@@ -235,7 +235,7 @@ define arm_aapcs_vfpcc <8 x i16> @shuffle3_i16(<8 x i16> %src) {
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; CHECK-LV-NEXT: vmov.f32 s7, s1
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; CHECK-LV-NEXT: vmov q0, q1
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; CHECK-LV-NEXT: bx lr
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-
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+ ;
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; CHECK-LIS-LABEL: shuffle3_i16:
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; CHECK-LIS: @ %bb.0: @ %entry
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; CHECK-LIS-NEXT: vmov q1, q0
@@ -248,6 +248,7 @@ define arm_aapcs_vfpcc <8 x i16> @shuffle3_i16(<8 x i16> %src) {
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; CHECK-LIS-NEXT: vmov.f32 s3, s5
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; CHECK-LIS-NEXT: vins.f16 s1, s7
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; CHECK-LIS-NEXT: bx lr
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+
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entry:
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%out = shufflevector <8 x i16 > %src , <8 x i16 > undef , <8 x i32 > <i32 4 , i32 5 , i32 7 , i32 6 , i32 3 , i32 1 , i32 2 , i32 0 >
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ret <8 x i16 > %out
@@ -1170,7 +1171,7 @@ define arm_aapcs_vfpcc <8 x half> @shuffle3_f16(<8 x half> %src) {
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; CHECK-LV-NEXT: vmov.f32 s7, s1
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; CHECK-LV-NEXT: vmov q0, q1
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; CHECK-LV-NEXT: bx lr
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-
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+ ;
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; CHECK-LIS-LABEL: shuffle3_f16:
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; CHECK-LIS: @ %bb.0: @ %entry
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; CHECK-LIS-NEXT: vmov q1, q0
@@ -1183,6 +1184,7 @@ define arm_aapcs_vfpcc <8 x half> @shuffle3_f16(<8 x half> %src) {
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; CHECK-LIS-NEXT: vmov.f32 s3, s5
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; CHECK-LIS-NEXT: vins.f16 s1, s7
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; CHECK-LIS-NEXT: bx lr
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+
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entry:
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%out = shufflevector <8 x half > %src , <8 x half > undef , <8 x i32 > <i32 4 , i32 5 , i32 7 , i32 6 , i32 3 , i32 1 , i32 2 , i32 0 >
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ret <8 x half > %out
@@ -1514,7 +1516,7 @@ define arm_aapcs_vfpcc <8 x double> @shuffle9_f64(<4 x double> %src1, <4 x doubl
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; CHECK-LV-NEXT: vmov q1, q5
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; CHECK-LV-NEXT: vpop {d8, d9, d10, d11}
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; CHECK-LV-NEXT: bx lr
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-
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+ ;
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; CHECK-LIS-LABEL: shuffle9_f64:
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; CHECK-LIS: @ %bb.0: @ %entry
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; CHECK-LIS-NEXT: .vsave {d8, d9, d10, d11}
@@ -1534,6 +1536,7 @@ define arm_aapcs_vfpcc <8 x double> @shuffle9_f64(<4 x double> %src1, <4 x doubl
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; CHECK-LIS-NEXT: vmov q1, q5
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; CHECK-LIS-NEXT: vpop {d8, d9, d10, d11}
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; CHECK-LIS-NEXT: bx lr
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+
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entry:
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%out = shufflevector <4 x double > %src1 , <4 x double > %src2 , <8 x i32 > <i32 0 , i32 4 , i32 1 , i32 5 , i32 2 , i32 6 , i32 3 , i32 7 >
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ret <8 x double > %out
@@ -1627,7 +1630,7 @@ define arm_aapcs_vfpcc <8 x i64> @shuffle9_i64(<4 x i64> %src1, <4 x i64> %src2)
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; CHECK-LV-NEXT: vmov q1, q5
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; CHECK-LV-NEXT: vpop {d8, d9, d10, d11}
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; CHECK-LV-NEXT: bx lr
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-
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+ ;
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; CHECK-LIS-LABEL: shuffle9_i64:
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; CHECK-LIS: @ %bb.0: @ %entry
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; CHECK-LIS-NEXT: .vsave {d8, d9, d10, d11}
@@ -1647,6 +1650,7 @@ define arm_aapcs_vfpcc <8 x i64> @shuffle9_i64(<4 x i64> %src1, <4 x i64> %src2)
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; CHECK-LIS-NEXT: vmov q1, q5
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; CHECK-LIS-NEXT: vpop {d8, d9, d10, d11}
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; CHECK-LIS-NEXT: bx lr
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+
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entry:
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%out = shufflevector <4 x i64 > %src1 , <4 x i64 > %src2 , <8 x i32 > <i32 0 , i32 4 , i32 1 , i32 5 , i32 2 , i32 6 , i32 3 , i32 7 >
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ret <8 x i64 > %out
@@ -1886,6 +1890,3 @@ entry:
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ret double %res
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}
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- ;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
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- ; CHECK-LIS: {{.*}}
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- ; CHECK-LV: {{.*}}
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