[RISCV] Put REQUIRES: riscv-registered-target in the first line of the file. NFC.

To be more consistent with other files.

Author: tclin914

clang/test/Driver/print-enabled-extensions/riscv-andes-a25.c

@@ -1,5 +1,5 @@
-// RUN: %clang --target=riscv32 -mcpu=andes-a25 --print-enabled-extensions | FileCheck %s
 // REQUIRES: riscv-registered-target
+// RUN: %clang --target=riscv32 -mcpu=andes-a25 --print-enabled-extensions | FileCheck %s
 
 // CHECK: Extensions enabled for the given RISC-V target
 // CHECK-EMPTY:

clang/test/Driver/print-enabled-extensions/riscv-andes-a45.c

@@ -1,5 +1,5 @@
-// RUN: %clang --target=riscv32 -mcpu=andes-a45 --print-enabled-extensions | FileCheck %s
 // REQUIRES: riscv-registered-target
+// RUN: %clang --target=riscv32 -mcpu=andes-a45 --print-enabled-extensions | FileCheck %s
 
 // CHECK: Extensions enabled for the given RISC-V target
 // CHECK-EMPTY:

clang/test/Driver/print-enabled-extensions/riscv-andes-ax25.c

@@ -1,5 +1,5 @@
-// RUN: %clang --target=riscv64 -mcpu=andes-ax25 --print-enabled-extensions | FileCheck %s
 // REQUIRES: riscv-registered-target
+// RUN: %clang --target=riscv64 -mcpu=andes-ax25 --print-enabled-extensions | FileCheck %s
 
 // CHECK: Extensions enabled for the given RISC-V target
 // CHECK-EMPTY:

clang/test/Driver/print-enabled-extensions/riscv-andes-ax45.c

@@ -1,5 +1,5 @@
-// RUN: %clang --target=riscv64 -mcpu=andes-ax45 --print-enabled-extensions | FileCheck %s
 // REQUIRES: riscv-registered-target
+// RUN: %clang --target=riscv64 -mcpu=andes-ax45 --print-enabled-extensions | FileCheck %s
 
 // CHECK: Extensions enabled for the given RISC-V target
 // CHECK-EMPTY:

clang/test/Driver/print-enabled-extensions/riscv-andes-ax45mpv.c

@@ -1,5 +1,5 @@
-// RUN: %clang --target=riscv64 -mcpu=andes-ax45mpv --print-enabled-extensions | FileCheck %s
 // REQUIRES: riscv-registered-target
+// RUN: %clang --target=riscv64 -mcpu=andes-ax45mpv --print-enabled-extensions | FileCheck %s
 
 // CHECK: Extensions enabled for the given RISC-V target
 // CHECK-EMPTY:

clang/test/Driver/print-enabled-extensions/riscv-andes-n45.c

@@ -1,5 +1,5 @@
-// RUN: %clang --target=riscv32 -mcpu=andes-n45 --print-enabled-extensions | FileCheck %s
 // REQUIRES: riscv-registered-target
+// RUN: %clang --target=riscv32 -mcpu=andes-n45 --print-enabled-extensions | FileCheck %s
 
 // CHECK: Extensions enabled for the given RISC-V target
 // CHECK-EMPTY:

clang/test/Driver/print-enabled-extensions/riscv-andes-nx45.c

@@ -1,5 +1,5 @@
-// RUN: %clang --target=riscv64 -mcpu=andes-nx45 --print-enabled-extensions | FileCheck %s
 // REQUIRES: riscv-registered-target
+// RUN: %clang --target=riscv64 -mcpu=andes-nx45 --print-enabled-extensions | FileCheck %s
 
 // CHECK: Extensions enabled for the given RISC-V target
 // CHECK-EMPTY:

clang/test/Driver/print-enabled-extensions/riscv-sifive-p870.c

@@ -1,5 +1,5 @@
-// RUN: %clang --target=riscv64 -mcpu=sifive-p870 --print-enabled-extensions | FileCheck %s
 // REQUIRES: riscv-registered-target
+// RUN: %clang --target=riscv64 -mcpu=sifive-p870 --print-enabled-extensions | FileCheck %s
 
 // CHECK: Extensions enabled for the given RISC-V target
 // CHECK-EMPTY:

clang/test/Driver/print-enabled-extensions/riscv-sifive-x390.c

@@ -1,5 +1,5 @@
-// RUN: %clang --target=riscv64 -mcpu=sifive-x390 -menable-experimental-extensions --print-enabled-extensions | FileCheck %s
 // REQUIRES: riscv-registered-target
+// RUN: %clang --target=riscv64 -mcpu=sifive-x390 -menable-experimental-extensions --print-enabled-extensions | FileCheck %s
 
 // CHECK:     Name                 Version   Description
 // CHECK-NEXT:     i                    2.1       'I' (Base Integer Instruction Set)