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‎llvm/test/CodeGen/X86/setcc-fsh.ll

Lines changed: 349 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -520,3 +520,352 @@ define i1 @fshl_or_ne_2(i32 %x, i32 %y) {
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%r = icmp ne i32 %f, 2
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ret i1 %r
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}
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define i1 @and_rotl_eq_neg_1(i8 %x, i8 %y, i8 %z) nounwind {
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; CHECK-LABEL: and_rotl_eq_neg_1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edx, %ecx
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; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
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; CHECK-NEXT: rolb %cl, %dil
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; CHECK-NEXT: andb %sil, %dil
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; CHECK-NEXT: cmpb $-1, %dil
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; CHECK-NEXT: sete %al
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; CHECK-NEXT: retq
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%rot = tail call i8 @llvm.fshl.i8(i8 %x, i8 %x, i8 %z)
535+
%and = and i8 %rot, %y
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%r = icmp eq i8 %and, -1
537+
ret i1 %r
538+
}
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540+
define i1 @and_rotr_ne_neg_1(i64 %x, i64 %y, i64 %z) nounwind {
541+
; CHECK-LABEL: and_rotr_ne_neg_1:
542+
; CHECK: # %bb.0:
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; CHECK-NEXT: movq %rdx, %rcx
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; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
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; CHECK-NEXT: rorq %cl, %rdi
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; CHECK-NEXT: testq %rdi, %rsi
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; CHECK-NEXT: setne %al
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; CHECK-NEXT: retq
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%rot = tail call i64 @llvm.fshr.i64(i64 %x, i64 %x, i64 %z)
550+
%and = and i64 %y, %rot
551+
%r = icmp ne i64 %and, 0
552+
ret i1 %r
553+
}
554+
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; negative test - wrong constant
556+
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define i1 @or_rotl_ne_neg_1(i32 %x, i32 %y, i32 %z) nounwind {
558+
; CHECK-LABEL: or_rotl_ne_neg_1:
559+
; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edx, %ecx
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; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
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; CHECK-NEXT: roll %cl, %edi
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; CHECK-NEXT: testl %edi, %esi
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; CHECK-NEXT: setne %al
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; CHECK-NEXT: retq
566+
%rot = tail call i32 @llvm.fshl.i32(i32 %x, i32 %x, i32 %z)
567+
%and = and i32 %y, %rot
568+
%r = icmp ne i32 %and, 0
569+
ret i1 %r
570+
}
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; negative test - extra use
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define i1 @and_rotl_ne_neg_1_use(i32 %x, i32 %y, i32 %z) nounwind {
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; CHECK-LABEL: and_rotl_ne_neg_1_use:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: movl %edx, %ecx
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; CHECK-NEXT: movl %edi, %ebx
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; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
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; CHECK-NEXT: roll %cl, %ebx
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; CHECK-NEXT: andl %esi, %ebx
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; CHECK-NEXT: movl %ebx, %edi
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; CHECK-NEXT: callq use32@PLT
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; CHECK-NEXT: cmpl $-1, %ebx
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; CHECK-NEXT: setne %al
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: retq
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%rot = tail call i32 @llvm.fshl.i32(i32 %x, i32 %x, i32 %z)
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%and = and i32 %y, %rot
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call void @use32(i32 %and)
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%r = icmp ne i32 %and, -1
593+
ret i1 %r
594+
}
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define <4 x i1> @and_rotl_ne_eq_neg_1(<4 x i32> %x, <4 x i32> %y) nounwind {
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; CHECK-LABEL: and_rotl_ne_eq_neg_1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movdqa %xmm1, %xmm2
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; CHECK-NEXT: pslld $23, %xmm2
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; CHECK-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
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; CHECK-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
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; CHECK-NEXT: cvttps2dq %xmm2, %xmm2
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; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
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; CHECK-NEXT: pmuludq %xmm2, %xmm0
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; CHECK-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,3,2,3]
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; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
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; CHECK-NEXT: pmuludq %xmm3, %xmm2
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; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,3,2,3]
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; CHECK-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
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; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm0[0,2,2,3]
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
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; CHECK-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1]
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; CHECK-NEXT: por %xmm4, %xmm3
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; CHECK-NEXT: pand %xmm1, %xmm3
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; CHECK-NEXT: pcmpeqd %xmm0, %xmm0
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; CHECK-NEXT: pcmpeqd %xmm3, %xmm0
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; CHECK-NEXT: retq
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%rot = tail call <4 x i32> @llvm.fshl.v4i32(<4 x i32>%x, <4 x i32> %x, <4 x i32> %y)
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%and = and <4 x i32> %y, %rot
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%r = icmp eq <4 x i32> %and, <i32 -1, i32 -1, i32 -1, i32 poison>
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ret <4 x i1> %r
623+
}
624+
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define i1 @fshl_or_eq_neg_1(i32 %x, i32 %y) {
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; CHECK-LABEL: fshl_or_eq_neg_1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: andl %edi, %esi
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; CHECK-NEXT: shldl $5, %edi, %esi
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; CHECK-NEXT: cmpl $-1, %esi
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; CHECK-NEXT: sete %al
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; CHECK-NEXT: retq
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%and = and i32 %x, %y
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%f = call i32 @llvm.fshl.i32(i32 %and, i32 %x, i32 5)
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%r = icmp eq i32 %f, -1
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ret i1 %r
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}
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define i1 @fshl_and_commute_eq_neg_1(i32 %x, i32 %y) {
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; CHECK-LABEL: fshl_and_commute_eq_neg_1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: andl %edi, %esi
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; CHECK-NEXT: shldl $5, %edi, %esi
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; CHECK-NEXT: cmpl $-1, %esi
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; CHECK-NEXT: sete %al
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; CHECK-NEXT: retq
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%and = and i32 %y, %x
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%f = call i32 @llvm.fshl.i32(i32 %and, i32 %x, i32 5)
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%r = icmp eq i32 %f, -1
650+
ret i1 %r
651+
}
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define <4 x i1> @fshl_and2_eq_neg_1(<4 x i32> %x, <4 x i32> %y) {
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; CHECK-LABEL: fshl_and2_eq_neg_1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pand %xmm0, %xmm1
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; CHECK-NEXT: psrld $7, %xmm1
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; CHECK-NEXT: pslld $25, %xmm0
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; CHECK-NEXT: por %xmm1, %xmm0
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; CHECK-NEXT: pcmpeqd %xmm1, %xmm1
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; CHECK-NEXT: pcmpeqd %xmm1, %xmm0
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; CHECK-NEXT: retq
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%and = and <4 x i32> %x, %y
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%f = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %x, <4 x i32> %and, <4 x i32> <i32 25, i32 25, i32 25, i32 25>)
665+
%r = icmp eq <4 x i32> %f, <i32 -1, i32 -1, i32 -1, i32 -1>
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ret <4 x i1> %r
667+
}
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define <4 x i1> @fshl_and2_commute_eq_neg_1(<4 x i32> %x, <4 x i32> %y) {
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; CHECK-LABEL: fshl_and2_commute_eq_neg_1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pand %xmm0, %xmm1
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; CHECK-NEXT: psrld $7, %xmm1
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; CHECK-NEXT: pslld $25, %xmm0
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; CHECK-NEXT: por %xmm1, %xmm0
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; CHECK-NEXT: pcmpeqd %xmm1, %xmm1
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; CHECK-NEXT: pcmpeqd %xmm1, %xmm0
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; CHECK-NEXT: retq
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%and = and <4 x i32> %y, %x
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%f = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %x, <4 x i32> %and, <4 x i32> <i32 25, i32 25, i32 25, i32 25>)
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%r = icmp eq <4 x i32> %f, <i32 -1, i32 -1, i32 -1, i32 -1>
682+
ret <4 x i1> %r
683+
}
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define i1 @fshr_and_eq_neg_1(i16 %x, i16 %y) {
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; CHECK-LABEL: fshr_and_eq_neg_1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: andl %edi, %esi
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; CHECK-NEXT: shldw $8, %di, %si
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; CHECK-NEXT: cmpw $-1, %si
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; CHECK-NEXT: sete %al
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; CHECK-NEXT: retq
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%and = and i16 %x, %y
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%f = call i16 @llvm.fshr.i16(i16 %and, i16 %x, i16 8)
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%r = icmp eq i16 %f, -1
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ret i1 %r
697+
}
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define i1 @fshr_and_commute_eq_neg_1(i16 %x, i16 %y) {
700+
; CHECK-LABEL: fshr_and_commute_eq_neg_1:
701+
; CHECK: # %bb.0:
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; CHECK-NEXT: andl %edi, %esi
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; CHECK-NEXT: shldw $8, %di, %si
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; CHECK-NEXT: cmpw $-1, %si
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; CHECK-NEXT: sete %al
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; CHECK-NEXT: retq
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%and = and i16 %y, %x
708+
%f = call i16 @llvm.fshr.i16(i16 %and, i16 %x, i16 8)
709+
%r = icmp eq i16 %f, -1
710+
ret i1 %r
711+
}
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define i1 @fshr_and2_eq_neg_1(i64 %x, i64 %y) {
714+
; CHECK-LABEL: fshr_and2_eq_neg_1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: andq %rdi, %rsi
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; CHECK-NEXT: shrdq $3, %rdi, %rsi
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; CHECK-NEXT: sete %al
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; CHECK-NEXT: retq
720+
%and = and i64 %x, %y
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%f = call i64 @llvm.fshr.i64(i64 %x, i64 %and, i64 3)
722+
%r = icmp eq i64 %f, 0
723+
ret i1 %r
724+
}
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define i1 @fshr_and2_commute_eq_neg_1(i64 %x, i64 %y) {
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; CHECK-LABEL: fshr_and2_commute_eq_neg_1:
728+
; CHECK: # %bb.0:
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; CHECK-NEXT: andq %rdi, %rsi
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; CHECK-NEXT: shrdq $3, %rdi, %rsi
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; CHECK-NEXT: cmpq $-1, %rsi
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; CHECK-NEXT: sete %al
733+
; CHECK-NEXT: retq
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%and = and i64 %y, %x
735+
%f = call i64 @llvm.fshr.i64(i64 %x, i64 %and, i64 3)
736+
%r = icmp eq i64 %f, -1
737+
ret i1 %r
738+
}
739+
740+
define i1 @fshl_and_ne_neg_1(i32 %x, i32 %y) {
741+
; CHECK-LABEL: fshl_and_ne_neg_1:
742+
; CHECK: # %bb.0:
743+
; CHECK-NEXT: andl %edi, %esi
744+
; CHECK-NEXT: shldl $7, %edi, %esi
745+
; CHECK-NEXT: cmpl $-1, %esi
746+
; CHECK-NEXT: setne %al
747+
; CHECK-NEXT: retq
748+
%and = and i32 %x, %y
749+
%f = call i32 @llvm.fshl.i32(i32 %and, i32 %x, i32 7)
750+
%r = icmp ne i32 %f, -1
751+
ret i1 %r
752+
}
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define i1 @fshl_and_commute_ne_neg_1(i32 %x, i32 %y) {
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; CHECK-LABEL: fshl_and_commute_ne_neg_1:
756+
; CHECK: # %bb.0:
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; CHECK-NEXT: andl %edi, %esi
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; CHECK-NEXT: shldl $7, %edi, %esi
759+
; CHECK-NEXT: cmpl $-1, %esi
760+
; CHECK-NEXT: setne %al
761+
; CHECK-NEXT: retq
762+
%and = and i32 %y, %x
763+
%f = call i32 @llvm.fshl.i32(i32 %and, i32 %x, i32 7)
764+
%r = icmp ne i32 %f, -1
765+
ret i1 %r
766+
}
767+
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define <4 x i1> @fshl_and2_ne_neg_1(<4 x i32> %x, <4 x i32> %y) {
769+
; CHECK-LABEL: fshl_and2_ne_neg_1:
770+
; CHECK: # %bb.0:
771+
; CHECK-NEXT: pand %xmm0, %xmm1
772+
; CHECK-NEXT: psrld $27, %xmm1
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; CHECK-NEXT: pslld $5, %xmm0
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; CHECK-NEXT: por %xmm1, %xmm0
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; CHECK-NEXT: pcmpeqd %xmm1, %xmm1
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; CHECK-NEXT: pcmpeqd %xmm1, %xmm0
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; CHECK-NEXT: pxor %xmm1, %xmm0
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; CHECK-NEXT: retq
779+
%and = and <4 x i32> %x, %y
780+
%f = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %x, <4 x i32> %and, <4 x i32> <i32 5, i32 5, i32 5, i32 5>)
781+
%r = icmp ne <4 x i32> %f, <i32 -1, i32 -1, i32 -1, i32 -1>
782+
ret <4 x i1> %r
783+
}
784+
785+
define <4 x i1> @fshl_and2_commute_ne_neg_1(<4 x i32> %x, <4 x i32> %y) {
786+
; CHECK-LABEL: fshl_and2_commute_ne_neg_1:
787+
; CHECK: # %bb.0:
788+
; CHECK-NEXT: pand %xmm0, %xmm1
789+
; CHECK-NEXT: psrld $27, %xmm1
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; CHECK-NEXT: pslld $5, %xmm0
791+
; CHECK-NEXT: por %xmm1, %xmm0
792+
; CHECK-NEXT: pcmpeqd %xmm1, %xmm1
793+
; CHECK-NEXT: pcmpeqd %xmm1, %xmm0
794+
; CHECK-NEXT: pxor %xmm1, %xmm0
795+
; CHECK-NEXT: retq
796+
%and = and <4 x i32> %y, %x
797+
%f = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %x, <4 x i32> %and, <4 x i32> <i32 5, i32 5, i32 5, i32 5>)
798+
%r = icmp ne <4 x i32> %f, <i32 -1, i32 -1, i32 -1, i32 -1>
799+
ret <4 x i1> %r
800+
}
801+
802+
define i1 @fshr_and_ne_neg_1(i64 %x, i64 %y) {
803+
; CHECK-LABEL: fshr_and_ne_neg_1:
804+
; CHECK: # %bb.0:
805+
; CHECK-NEXT: andl %edi, %esi
806+
; CHECK-NEXT: shldq $63, %rdi, %rsi
807+
; CHECK-NEXT: cmpq $-1, %rsi
808+
; CHECK-NEXT: setne %al
809+
; CHECK-NEXT: retq
810+
%and = and i64 %x, %y
811+
%f = call i64 @llvm.fshr.i64(i64 %and, i64 %x, i64 1)
812+
%r = icmp ne i64 %f, -1
813+
ret i1 %r
814+
}
815+
816+
define i1 @fshr_and_commute_ne_neg_1(i64 %x, i64 %y) {
817+
; CHECK-LABEL: fshr_and_commute_ne_neg_1:
818+
; CHECK: # %bb.0:
819+
; CHECK-NEXT: andl %edi, %esi
820+
; CHECK-NEXT: shldq $63, %rdi, %rsi
821+
; CHECK-NEXT: cmpq $-1, %rsi
822+
; CHECK-NEXT: setne %al
823+
; CHECK-NEXT: retq
824+
%and = and i64 %y, %x
825+
%f = call i64 @llvm.fshr.i64(i64 %and, i64 %x, i64 1)
826+
%r = icmp ne i64 %f, -1
827+
ret i1 %r
828+
}
829+
830+
define i1 @fshr_and2_ne_neg_1(i16 %x, i16 %y) {
831+
; CHECK-LABEL: fshr_and2_ne_neg_1:
832+
; CHECK: # %bb.0:
833+
; CHECK-NEXT: andl %edi, %esi
834+
; CHECK-NEXT: shrdw $2, %di, %si
835+
; CHECK-NEXT: cmpw $-1, %si
836+
; CHECK-NEXT: setne %al
837+
; CHECK-NEXT: retq
838+
%and = and i16 %x, %y
839+
%f = call i16 @llvm.fshr.i16(i16 %x, i16 %and, i16 2)
840+
%r = icmp ne i16 %f, -1
841+
ret i1 %r
842+
}
843+
844+
define i1 @fshr_and2_commute_ne_neg_1(i16 %x, i16 %y) {
845+
; CHECK-LABEL: fshr_and2_commute_ne_neg_1:
846+
; CHECK: # %bb.0:
847+
; CHECK-NEXT: andl %edi, %esi
848+
; CHECK-NEXT: shrdw $2, %di, %si
849+
; CHECK-NEXT: cmpw $-1, %si
850+
; CHECK-NEXT: setne %al
851+
; CHECK-NEXT: retq
852+
%and = and i16 %y, %x
853+
%f = call i16 @llvm.fshr.i16(i16 %x, i16 %and, i16 2)
854+
%r = icmp ne i16 %f, -1
855+
ret i1 %r
856+
}
857+
858+
define i1 @fshl_and_ne_neg_1_2(i32 %x, i32 %y) {
859+
; CHECK-LABEL: fshl_and_ne_neg_1_2:
860+
; CHECK: # %bb.0:
861+
; CHECK-NEXT: andl %edi, %esi
862+
; CHECK-NEXT: shldl $2, %edi, %esi
863+
; CHECK-NEXT: cmpl $2, %esi
864+
; CHECK-NEXT: setne %al
865+
; CHECK-NEXT: retq
866+
%and = and i32 %x, %y
867+
%f = call i32 @llvm.fshl.i32(i32 %and, i32 %x, i32 2)
868+
%r = icmp ne i32 %f, 2
869+
ret i1 %r
870+
}
871+

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