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Revert "[llvm][NFC] Use llvm::sort()" (#140668)
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18 files changed

+62
-56
lines changed

18 files changed

+62
-56
lines changed

llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SeedCollector.h

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -141,10 +141,11 @@ template <typename LoadOrStoreT> class MemSeedBundle : public SeedBundle {
141141
"Expected LoadInst or StoreInst!");
142142
assert(all_of(Seeds, [](auto *S) { return isa<LoadOrStoreT>(S); }) &&
143143
"Expected Load or Store instructions!");
144-
llvm::sort(Seeds, [&SE](Instruction *I0, Instruction *I1) {
144+
auto Cmp = [&SE](Instruction *I0, Instruction *I1) {
145145
return Utils::atLowerAddress(cast<LoadOrStoreT>(I0),
146146
cast<LoadOrStoreT>(I1), SE);
147-
});
147+
};
148+
std::sort(Seeds.begin(), Seeds.end(), Cmp);
148149
}
149150
explicit MemSeedBundle(LoadOrStoreT *MemI) : SeedBundle(MemI) {
150151
static_assert(std::is_same<LoadOrStoreT, LoadInst>::value ||

llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2333,10 +2333,11 @@ static AssignmentTrackingLowering::OverlapMap buildOverlapMapAndRecordDeclares(
23332333
// order of fragment size - there should be no duplicates.
23342334
for (auto &Pair : FragmentMap) {
23352335
SmallVector<DebugVariable, 8> &Frags = Pair.second;
2336-
llvm::sort(Frags, [](const DebugVariable &Next, const DebugVariable &Elmt) {
2337-
return Elmt.getFragmentOrDefault().SizeInBits >
2338-
Next.getFragmentOrDefault().SizeInBits;
2339-
});
2336+
std::sort(Frags.begin(), Frags.end(),
2337+
[](const DebugVariable &Next, const DebugVariable &Elmt) {
2338+
return Elmt.getFragmentOrDefault().SizeInBits >
2339+
Next.getFragmentOrDefault().SizeInBits;
2340+
});
23402341
// Check for duplicates.
23412342
assert(std::adjacent_find(Frags.begin(), Frags.end()) == Frags.end());
23422343
}

llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1056,9 +1056,9 @@ void llvm::extractInstructionFeatures(
10561056
// frequency vector, mapping each instruction to its associated MBB.
10571057

10581058
// Start off by sorting the segments based on the beginning slot index.
1059-
llvm::sort(LRPosInfo, [](LRStartEndInfo A, LRStartEndInfo B) {
1060-
return A.Begin < B.Begin;
1061-
});
1059+
std::sort(
1060+
LRPosInfo.begin(), LRPosInfo.end(),
1061+
[](LRStartEndInfo A, LRStartEndInfo B) { return A.Begin < B.Begin; });
10621062
size_t InstructionIndex = 0;
10631063
size_t CurrentSegmentIndex = 0;
10641064
SlotIndex CurrentIndex = LRPosInfo[0].Begin;

llvm/lib/DWARFLinker/Parallel/ArrayList.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -82,7 +82,7 @@ template <typename T, size_t ItemsGroupSize = 512> class ArrayList {
8282
forEach([&](T &Item) { SortedItems.push_back(Item); });
8383

8484
if (SortedItems.size()) {
85-
llvm::sort(SortedItems, Comparator);
85+
std::sort(SortedItems.begin(), SortedItems.end(), Comparator);
8686

8787
size_t SortedItemIdx = 0;
8888
forEach([&](T &Item) { Item = SortedItems[SortedItemIdx++]; });

llvm/lib/ExecutionEngine/Orc/Core.cpp

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1142,9 +1142,8 @@ void JITDylib::dump(raw_ostream &OS) {
11421142
std::vector<std::pair<SymbolStringPtr, SymbolTableEntry *>> SymbolsSorted;
11431143
for (auto &KV : Symbols)
11441144
SymbolsSorted.emplace_back(KV.first, &KV.second);
1145-
llvm::sort(SymbolsSorted, [](const auto &L, const auto &R) {
1146-
return *L.first < *R.first;
1147-
});
1145+
std::sort(SymbolsSorted.begin(), SymbolsSorted.end(),
1146+
[](const auto &L, const auto &R) { return *L.first < *R.first; });
11481147

11491148
for (auto &KV : SymbolsSorted) {
11501149
OS << " \"" << *KV.first << "\": ";

llvm/lib/ExecutionEngine/Orc/Debugging/DebugInfoSupport.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -49,7 +49,7 @@ static void preserveDWARFSection(LinkGraph &G, Section &Sec) {
4949
static SmallVector<char, 0> getSectionData(Section &Sec) {
5050
SmallVector<char, 0> SecData;
5151
SmallVector<Block *, 8> SecBlocks(Sec.blocks().begin(), Sec.blocks().end());
52-
llvm::sort(SecBlocks, [](Block *LHS, Block *RHS) {
52+
std::sort(SecBlocks.begin(), SecBlocks.end(), [](Block *LHS, Block *RHS) {
5353
return LHS->getAddress() < RHS->getAddress();
5454
});
5555
// Convert back to what object file would have, one blob of section content

llvm/lib/ProfileData/InstrProfReader.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -488,7 +488,7 @@ RawInstrProfReader<IntPtrT>::getTemporalProfTraces(
488488
return TemporalProfTraces;
489489
}
490490
// Sort functions by their timestamps to build the trace.
491-
llvm::sort(TemporalProfTimestamps);
491+
std::sort(TemporalProfTimestamps.begin(), TemporalProfTimestamps.end());
492492
TemporalProfTraceTy Trace;
493493
if (Weight)
494494
Trace.Weight = *Weight;

llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -589,7 +589,7 @@ void PipelineSolver::populateReadyList(
589589
}
590590

591591
if (UseCostHeur)
592-
llvm::sort(ReadyList, llvm::less_second());
592+
std::sort(ReadyList.begin(), ReadyList.end(), llvm::less_second());
593593

594594
assert(ReadyList.size() == CurrSU.second.size());
595595
}

llvm/lib/Target/AMDGPU/AMDGPUPreloadKernelArguments.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -224,7 +224,7 @@ class PreloadKernelArgInfo {
224224

225225
// Allocate loads in order of offset. We need to be sure that the implicit
226226
// argument can actually be preloaded.
227-
llvm::sort(ImplicitArgLoads, less_second());
227+
std::sort(ImplicitArgLoads.begin(), ImplicitArgLoads.end(), less_second());
228228

229229
// If we fail to preload any implicit argument we know we don't have SGPRs
230230
// to preload any subsequent ones with larger offsets. Find the first

llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -6844,8 +6844,8 @@ bool ARMPipelinerLoopInfo::tooMuchRegisterPressure(SwingSchedulerDAG &SSD,
68446844
++Stage) {
68456845
std::deque<SUnit *> Instrs =
68466846
SMS.getInstructions(Cycle + Stage * SMS.getInitiationInterval());
6847-
llvm::sort(Instrs,
6848-
[](SUnit *A, SUnit *B) { return A->NodeNum > B->NodeNum; });
6847+
std::sort(Instrs.begin(), Instrs.end(),
6848+
[](SUnit *A, SUnit *B) { return A->NodeNum > B->NodeNum; });
68496849
llvm::append_range(ProposedSchedule, Instrs);
68506850
}
68516851

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