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AMDGPU: Remove global_atomic_ordered_add_b64 from gfx1250 support (#145781)
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2 files changed

+17
-12
lines changed

2 files changed

+17
-12
lines changed

llvm/lib/Target/AMDGPU/FLATInstructions.td

Lines changed: 14 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1036,9 +1036,11 @@ defm GLOBAL_LOAD_LDS_DWORDX3 : FLAT_Global_Load_LDS_Pseudo <"global_load_lds_dwo
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defm GLOBAL_LOAD_LDS_DWORDX4 : FLAT_Global_Load_LDS_Pseudo <"global_load_lds_dwordx4">;
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}
10381038

1039+
let SubtargetPredicate = isGFX12PlusNot12_50 in
1040+
defm GLOBAL_ATOMIC_ORDERED_ADD_B64 : FLAT_Global_Atomic_Pseudo <"global_atomic_ordered_add_b64", VReg_64, i64>;
1041+
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let SubtargetPredicate = isGFX12Plus in {
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defm GLOBAL_ATOMIC_COND_SUB_U32 : FLAT_Global_Atomic_Pseudo <"global_atomic_cond_sub_u32", VGPR_32, i32>;
1041-
defm GLOBAL_ATOMIC_ORDERED_ADD_B64 : FLAT_Global_Atomic_Pseudo <"global_atomic_ordered_add_b64", VReg_64, i64>;
10421044

10431045
def GLOBAL_INV : FLAT_Global_Invalidate_Writeback<"global_inv">;
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def GLOBAL_WB : FLAT_Global_Invalidate_Writeback<"global_wb">;
@@ -1827,19 +1829,19 @@ let SubtargetPredicate = isGFX12Plus in {
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defm : GlobalFLATAtomicPatsNoRtnWithAddrSpace <"GLOBAL_ATOMIC_COND_SUB_U32", "int_amdgcn_atomic_cond_sub_u32", "global_addrspace", i32>;
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}
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1830-
let OtherPredicates = [isGFX12Plus] in {
1832+
let OtherPredicates = [isGFX12PlusNot12_50] in
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defm : GlobalFLATAtomicPatsRtn <"GLOBAL_ATOMIC_ORDERED_ADD_B64", "int_amdgcn_global_atomic_ordered_add_b64", i64, i64, /* isIntr */ 1>;
18321834

1833-
let WaveSizePredicate = isWave32 in {
1834-
defm : GlobalFLATLoadPats <GLOBAL_LOAD_TR_B64_w32, int_amdgcn_global_load_tr_b64, v2i32>;
1835-
foreach vt = [v8i16, v8f16, v8bf16] in
1836-
defm : GlobalFLATLoadPats <GLOBAL_LOAD_TR_B128_w32, int_amdgcn_global_load_tr_b128, vt>;
1837-
}
1838-
let WaveSizePredicate = isWave64 in {
1839-
defm : GlobalFLATLoadPats <GLOBAL_LOAD_TR_B64_w64, int_amdgcn_global_load_tr_b64, i32>;
1840-
foreach vt = [v4i16, v4f16, v4bf16] in
1841-
defm : GlobalFLATLoadPats <GLOBAL_LOAD_TR_B128_w64, int_amdgcn_global_load_tr_b128, vt>;
1842-
}
1835+
let WaveSizePredicate = isWave32, OtherPredicates = [isGFX12Plus] in {
1836+
defm : GlobalFLATLoadPats <GLOBAL_LOAD_TR_B64_w32, int_amdgcn_global_load_tr_b64, v2i32>;
1837+
foreach vt = [v8i16, v8f16, v8bf16] in
1838+
defm : GlobalFLATLoadPats <GLOBAL_LOAD_TR_B128_w32, int_amdgcn_global_load_tr_b128, vt>;
1839+
}
1840+
1841+
let WaveSizePredicate = isWave64, OtherPredicates = [isGFX12PlusNot12_50] in {
1842+
defm : GlobalFLATLoadPats <GLOBAL_LOAD_TR_B64_w64, int_amdgcn_global_load_tr_b64, i32>;
1843+
foreach vt = [v4i16, v4f16, v4bf16] in
1844+
defm : GlobalFLATLoadPats <GLOBAL_LOAD_TR_B128_w64, int_amdgcn_global_load_tr_b128, vt>;
18431845
}
18441846

18451847
let SubtargetPredicate = HasAtomicFMinFMaxF32GlobalInsts, OtherPredicates = [HasFlatGlobalInsts] in {

llvm/test/MC/AMDGPU/gfx1250_asm_unsupported.s

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
; RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1250 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX1250-ERR --implicit-check-not=error: --strict-whitespace %s
22

3+
global_atomic_ordered_add_b64 v0, v[2:3], s[0:1] offset:-64
4+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
5+
36
;; DOT4_F32_*, DOT2_F32_*, DOT2_F16 and DOT2_BF16
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58
v_dot4_f32_fp8_fp8 v0, v1, v2, v3

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