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[DAG] Add SDPatternMatch::m_Load (#145481)
Add SDPatternMatch matcher and unit test coverage for `ISD::LOAD` opcode. This only matches the loaded value i.e. ResNo 0 and not the output chain. e.g. ``` m_Load(m_Value(), m_Value(), m_Value()) ``` The first value is the input chain, the second is the base pointer, and the last value is the offset.
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llvm/include/llvm/CodeGen/SDPatternMatch.h

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@@ -530,6 +530,13 @@ m_VSelect(const T0_P &Cond, const T1_P &T, const T2_P &F) {
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return TernaryOpc_match<T0_P, T1_P, T2_P>(ISD::VSELECT, Cond, T, F);
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}
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template <typename T0_P, typename T1_P, typename T2_P>
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inline Result_match<0, TernaryOpc_match<T0_P, T1_P, T2_P>>
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m_Load(const T0_P &Ch, const T1_P &Ptr, const T2_P &Offset) {
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return m_Result<0>(
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TernaryOpc_match<T0_P, T1_P, T2_P>(ISD::LOAD, Ch, Ptr, Offset));
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}
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template <typename T0_P, typename T1_P, typename T2_P>
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inline TernaryOpc_match<T0_P, T1_P, T2_P>
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m_InsertElt(const T0_P &Vec, const T1_P &Val, const T2_P &Idx) {

llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp

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@@ -178,6 +178,12 @@ TEST_F(SelectionDAGPatternMatchTest, matchTernaryOp) {
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SDValue ExtractELT =
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DAG->getNode(ISD::EXTRACT_VECTOR_ELT, DL, Int32VT, V1, Op3);
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SDValue Ch = DAG->getEntryNode();
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SDValue BasePtr = DAG->getRegister(1, MVT::i64);
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SDValue Offset = DAG->getUNDEF(MVT::i64);
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MachinePointerInfo PtrInfo;
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SDValue Load = DAG->getLoad(MVT::i32, DL, Ch, BasePtr, PtrInfo);
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using namespace SDPatternMatch;
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ISD::CondCode CC;
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EXPECT_TRUE(sd_match(ICMP_UGT, m_SetCC(m_Value(), m_Value(),
@@ -230,6 +236,13 @@ TEST_F(SelectionDAGPatternMatchTest, matchTernaryOp) {
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EXPECT_FALSE(sd_match(
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InsertSubvector,
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m_InsertSubvector(m_Specific(V2), m_Specific(V3), m_SpecificInt(3))));
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EXPECT_TRUE(sd_match(
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Load, m_Load(m_Specific(Ch), m_Specific(BasePtr), m_Specific(Offset))));
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EXPECT_FALSE(
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sd_match(Load.getValue(1), m_Load(m_Specific(Ch), m_Specific(BasePtr),
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m_Specific(Offset))));
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}
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TEST_F(SelectionDAGPatternMatchTest, matchBinaryOp) {

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