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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 |
| 2 | +; RUN: opt < %s -S -passes=msan 2>&1 | FileCheck %s |
| 3 | +; |
| 4 | +; Test bitwise OR instructions, especially the "disjoint OR", which is |
| 5 | +; currently handled incorrectly by MSan (as if it was a regular OR). |
| 6 | + |
| 7 | +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" |
| 8 | +target triple = "x86_64-unknown-linux-gnu" |
| 9 | + |
| 10 | +define i8 @test_or(i8 %a, i8 %b) sanitize_memory { |
| 11 | +; CHECK-LABEL: define i8 @test_or( |
| 12 | +; CHECK-SAME: i8 [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0:[0-9]+]] { |
| 13 | +; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @__msan_param_tls, align 8 |
| 14 | +; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 |
| 15 | +; CHECK-NEXT: call void @llvm.donothing() |
| 16 | +; CHECK-NEXT: [[TMP3:%.*]] = xor i8 [[A]], -1 |
| 17 | +; CHECK-NEXT: [[TMP4:%.*]] = xor i8 [[B]], -1 |
| 18 | +; CHECK-NEXT: [[TMP5:%.*]] = and i8 [[TMP1]], [[TMP2]] |
| 19 | +; CHECK-NEXT: [[TMP6:%.*]] = and i8 [[TMP3]], [[TMP2]] |
| 20 | +; CHECK-NEXT: [[TMP7:%.*]] = and i8 [[TMP1]], [[TMP4]] |
| 21 | +; CHECK-NEXT: [[TMP8:%.*]] = or i8 [[TMP5]], [[TMP6]] |
| 22 | +; CHECK-NEXT: [[TMP9:%.*]] = or i8 [[TMP8]], [[TMP7]] |
| 23 | +; CHECK-NEXT: [[C:%.*]] = or i8 [[A]], [[B]] |
| 24 | +; CHECK-NEXT: store i8 [[TMP9]], ptr @__msan_retval_tls, align 8 |
| 25 | +; CHECK-NEXT: ret i8 [[C]] |
| 26 | +; |
| 27 | + %c = or i8 %a, %b |
| 28 | + ret i8 %c |
| 29 | +} |
| 30 | + |
| 31 | +define i8 @test_disjoint_or(i8 %a, i8 %b) sanitize_memory { |
| 32 | +; CHECK-LABEL: define i8 @test_disjoint_or( |
| 33 | +; CHECK-SAME: i8 [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] { |
| 34 | +; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @__msan_param_tls, align 8 |
| 35 | +; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 |
| 36 | +; CHECK-NEXT: call void @llvm.donothing() |
| 37 | +; CHECK-NEXT: [[TMP3:%.*]] = xor i8 [[A]], -1 |
| 38 | +; CHECK-NEXT: [[TMP4:%.*]] = xor i8 [[B]], -1 |
| 39 | +; CHECK-NEXT: [[TMP5:%.*]] = and i8 [[TMP1]], [[TMP2]] |
| 40 | +; CHECK-NEXT: [[TMP6:%.*]] = and i8 [[TMP3]], [[TMP2]] |
| 41 | +; CHECK-NEXT: [[TMP7:%.*]] = and i8 [[TMP1]], [[TMP4]] |
| 42 | +; CHECK-NEXT: [[TMP8:%.*]] = or i8 [[TMP5]], [[TMP6]] |
| 43 | +; CHECK-NEXT: [[TMP11:%.*]] = or i8 [[TMP8]], [[TMP7]] |
| 44 | +; CHECK-NEXT: [[C:%.*]] = or disjoint i8 [[A]], [[B]] |
| 45 | +; CHECK-NEXT: store i8 [[TMP11]], ptr @__msan_retval_tls, align 8 |
| 46 | +; CHECK-NEXT: ret i8 [[C]] |
| 47 | +; |
| 48 | + %c = or disjoint i8 %a, %b |
| 49 | + ret i8 %c |
| 50 | +} |
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