@@ -331,7 +331,7 @@ define float @extract_v4i32_minimum(<4 x float> %a, <4 x float> %b, i32 %c) {
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; CHECK-GI-NEXT: add sp, sp, #16
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; CHECK-GI-NEXT: ret
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entry:
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- %vector = call <4 x float > @llvm.minimum.v4float (<4 x float > %a , <4 x float > %b )
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+ %vector = call <4 x float > @llvm.minimum.v4f32 (<4 x float > %a , <4 x float > %b )
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%d = extractelement <4 x float > %vector , i32 %c
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ret float %d
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}
@@ -367,7 +367,7 @@ define float @extract_v4i32_minimum_build_vector(<4 x float> %a, <4 x float> %b,
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; CHECK-GI-NEXT: add sp, sp, #16
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; CHECK-GI-NEXT: ret
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entry:
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- %vector = call <4 x float > @llvm.minimum.v4float (<4 x float > %a , <4 x float > <float 42 .0 , float 11 .0 , float 17 .0 , float 6 .0 >)
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+ %vector = call <4 x float > @llvm.minimum.v4f32 (<4 x float > %a , <4 x float > <float 42 .0 , float 11 .0 , float 17 .0 , float 6 .0 >)
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%d = extractelement <4 x float > %vector , i32 %c
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ret float %d
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}
@@ -381,7 +381,7 @@ define float @extract_v4i32_minimum_build_vector_const(<4 x float> %a, <4 x floa
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; CHECK-NEXT: mov s0, v0.s[1]
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; CHECK-NEXT: ret
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entry:
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- %vector = call <4 x float > @llvm.minimum.v4float (<4 x float > %a , <4 x float > <float 42 .0 , float 11 .0 , float 17 .0 , float 6 .0 >)
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+ %vector = call <4 x float > @llvm.minimum.v4f32 (<4 x float > %a , <4 x float > <float 42 .0 , float 11 .0 , float 17 .0 , float 6 .0 >)
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%d = extractelement <4 x float > %vector , i32 1
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ret float %d
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}
@@ -414,7 +414,7 @@ define float @extract_v4i32_copysign_build_vector(<4 x float> %a, <4 x float> %b
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; CHECK-GI-NEXT: add sp, sp, #16
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; CHECK-GI-NEXT: ret
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entry:
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- %vector = call <4 x float > @llvm.copysign.v4float (<4 x float > %a , <4 x float > <float 42 .0 , float 11 .0 , float 17 .0 , float 6 .0 >)
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+ %vector = call <4 x float > @llvm.copysign.v4f32 (<4 x float > %a , <4 x float > <float 42 .0 , float 11 .0 , float 17 .0 , float 6 .0 >)
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%d = extractelement <4 x float > %vector , i32 %c
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ret float %d
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}
@@ -433,7 +433,7 @@ define float @extract_v4i32_copysign_build_vector_const(<4 x float> %a, <4 x flo
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; CHECK-GI-NEXT: mov s0, v0.s[2]
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; CHECK-GI-NEXT: ret
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entry:
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- %vector = call <4 x float > @llvm.copysign.v4float (<4 x float > %a , <4 x float > <float 42 .0 , float 11 .0 , float 17 .0 , float 6 .0 >)
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+ %vector = call <4 x float > @llvm.copysign.v4f32 (<4 x float > %a , <4 x float > <float 42 .0 , float 11 .0 , float 17 .0 , float 6 .0 >)
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%d = extractelement <4 x float > %vector , i32 2
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ret float %d
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}
@@ -508,8 +508,8 @@ entry:
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ret i32 %d
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}
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- define i32 @extract_v4float_fcmp (<4 x float > %a , <4 x float > %b , i32 %c ) {
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- ; CHECK-SD-LABEL: extract_v4float_fcmp :
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+ define i32 @extract_v4f32_fcmp (<4 x float > %a , <4 x float > %b , i32 %c ) {
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+ ; CHECK-SD-LABEL: extract_v4f32_fcmp :
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; CHECK-SD: // %bb.0: // %entry
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; CHECK-SD-NEXT: sub sp, sp, #16
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; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
@@ -524,7 +524,7 @@ define i32 @extract_v4float_fcmp(<4 x float> %a, <4 x float> %b, i32 %c) {
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; CHECK-SD-NEXT: add sp, sp, #16
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; CHECK-SD-NEXT: ret
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;
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- ; CHECK-GI-LABEL: extract_v4float_fcmp :
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+ ; CHECK-GI-LABEL: extract_v4f32_fcmp :
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; CHECK-GI: // %bb.0: // %entry
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; CHECK-GI-NEXT: sub sp, sp, #16
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; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
@@ -548,16 +548,16 @@ entry:
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ret i32 %d
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}
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- define i32 @extract_v4float_fcmp_const (<4 x float > %a , <4 x float > %b , i32 %c ) {
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- ; CHECK-SD-LABEL: extract_v4float_fcmp_const :
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+ define i32 @extract_v4f32_fcmp_const (<4 x float > %a , <4 x float > %b , i32 %c ) {
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+ ; CHECK-SD-LABEL: extract_v4f32_fcmp_const :
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; CHECK-SD: // %bb.0: // %entry
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; CHECK-SD-NEXT: movi v1.4s, #1
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; CHECK-SD-NEXT: fcmeq v0.4s, v0.4s, v0.4s
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; CHECK-SD-NEXT: bic v0.16b, v1.16b, v0.16b
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; CHECK-SD-NEXT: mov w0, v0.s[1]
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; CHECK-SD-NEXT: ret
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;
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- ; CHECK-GI-LABEL: extract_v4float_fcmp_const :
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+ ; CHECK-GI-LABEL: extract_v4f32_fcmp_const :
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; CHECK-GI: // %bb.0: // %entry
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; CHECK-GI-NEXT: fmov v1.4s, #1.00000000
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; CHECK-GI-NEXT: fcmge v2.4s, v0.4s, v1.4s
@@ -680,9 +680,9 @@ define i32 @extract_v4i32_abs(<4 x float> %a, i32 %c) {
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; CHECK-GI-NEXT: add sp, sp, #16
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; CHECK-GI-NEXT: ret
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entry:
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- %ceil = call <4 x float > @llvm.ceil.v4float (<4 x float > %a )
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- %floor = call <4 x float > @llvm.floor.v4float (<4 x float > %ceil )
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- %fabs = call <4 x float > @llvm.fabs.v4float (<4 x float > %floor )
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+ %ceil = call <4 x float > @llvm.ceil.v4f32 (<4 x float > %a )
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+ %floor = call <4 x float > @llvm.floor.v4f32 (<4 x float > %ceil )
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+ %fabs = call <4 x float > @llvm.fabs.v4f32 (<4 x float > %floor )
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%abs = fptosi <4 x float > %fabs to <4 x i32 >
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%vector = call <4 x i32 > @llvm.abs.v4i32 (<4 x i32 > %abs , i1 0 )
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%d = extractelement <4 x i32 > %vector , i32 %c
@@ -708,9 +708,9 @@ define i32 @extract_v4i32_abs_const(<4 x float> %a, i32 %c) {
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; CHECK-GI-NEXT: fmov w0, s0
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; CHECK-GI-NEXT: ret
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entry:
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- %ceil = call <4 x float > @llvm.ceil.v4float (<4 x float > <float 1 .0 , float 4 .0 , float 3 .0 , float 2 .0 >)
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- %floor = call <4 x float > @llvm.floor.v4float (<4 x float > %ceil )
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- %fabs = call <4 x float > @llvm.fabs.v4float (<4 x float > %floor )
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+ %ceil = call <4 x float > @llvm.ceil.v4f32 (<4 x float > <float 1 .0 , float 4 .0 , float 3 .0 , float 2 .0 >)
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+ %floor = call <4 x float > @llvm.floor.v4f32 (<4 x float > %ceil )
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+ %fabs = call <4 x float > @llvm.fabs.v4f32 (<4 x float > %floor )
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%abs = fptosi <4 x float > %fabs to <4 x i32 >
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%vector = call <4 x i32 > @llvm.abs.v4i32 (<4 x i32 > %abs , i1 0 )
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%d = extractelement <4 x i32 > %vector , i32 1
@@ -751,9 +751,9 @@ define i32 @extract_v4i32_abs_half_const(<4 x float> %a, i32 %c) {
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; CHECK-GI-NEXT: add sp, sp, #16
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; CHECK-GI-NEXT: ret
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entry:
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- %ceil = call <4 x float > @llvm.ceil.v4float (<4 x float > <float 1 .0 , float 4 .0 , float 3 .0 , float 2 .0 >)
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- %floor = call <4 x float > @llvm.floor.v4float (<4 x float > %ceil )
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- %fabs = call <4 x float > @llvm.fabs.v4float (<4 x float > %floor )
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+ %ceil = call <4 x float > @llvm.ceil.v4f32 (<4 x float > <float 1 .0 , float 4 .0 , float 3 .0 , float 2 .0 >)
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+ %floor = call <4 x float > @llvm.floor.v4f32 (<4 x float > %ceil )
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+ %fabs = call <4 x float > @llvm.fabs.v4f32 (<4 x float > %floor )
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%abs = fptosi <4 x float > %fabs to <4 x i32 >
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%vector = call <4 x i32 > @llvm.abs.v4i32 (<4 x i32 > %abs , i1 0 )
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%d = extractelement <4 x i32 > %vector , i32 %c
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