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MIPS: Reduce MipsMCExpr uses
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5 files changed

+27
-32
lines changed

5 files changed

+27
-32
lines changed

‎llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp

Lines changed: 14 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -3032,7 +3032,7 @@ bool MipsAsmParser::loadAndAddSymbolAddress(const MCExpr *SymExpr,
30323032
return false;
30333033
}
30343034

3035-
const MipsMCExpr *GotExpr = nullptr;
3035+
const MCSpecifierExpr *GotExpr = nullptr;
30363036
const MCExpr *LoExpr = nullptr;
30373037
if (ABI.IsN32() || ABI.IsN64()) {
30383038
// The remaining cases are:
@@ -3097,10 +3097,8 @@ bool MipsAsmParser::loadAndAddSymbolAddress(const MCExpr *SymExpr,
30973097
return false;
30983098
}
30993099

3100-
const MipsMCExpr *HiExpr =
3101-
MipsMCExpr::create(Mips::S_HI, SymExpr, getContext());
3102-
const MipsMCExpr *LoExpr =
3103-
MipsMCExpr::create(Mips::S_LO, SymExpr, getContext());
3100+
const auto *HiExpr = MipsMCExpr::create(Mips::S_HI, SymExpr, getContext());
3101+
const auto *LoExpr = MipsMCExpr::create(Mips::S_LO, SymExpr, getContext());
31043102

31053103
// This is the 64-bit symbol address expansion.
31063104
if (ABI.ArePtrs64bit() && isGP64bit()) {
@@ -3111,9 +3109,9 @@ bool MipsAsmParser::loadAndAddSymbolAddress(const MCExpr *SymExpr,
31113109
// If it is not available we exit if the destination is the same as the
31123110
// source register.
31133111

3114-
const MipsMCExpr *HighestExpr =
3112+
const auto *HighestExpr =
31153113
MipsMCExpr::create(Mips::S_HIGHEST, SymExpr, getContext());
3116-
const MipsMCExpr *HigherExpr =
3114+
const auto *HigherExpr =
31173115
MipsMCExpr::create(Mips::S_HIGHER, SymExpr, getContext());
31183116

31193117
bool RdRegIsRsReg =
@@ -3312,8 +3310,7 @@ bool MipsAsmParser::emitPartialAddress(MipsTargetStreamer &TOut, SMLoc IDLoc,
33123310

33133311
if(IsPicEnabled) {
33143312
const MCExpr *GotSym = MCSymbolRefExpr::create(Sym, getContext());
3315-
const MipsMCExpr *GotExpr =
3316-
MipsMCExpr::create(Mips::S_GOT, GotSym, getContext());
3313+
const auto *GotExpr = MipsMCExpr::create(Mips::S_GOT, GotSym, getContext());
33173314

33183315
if(isABI_O32() || isABI_N32()) {
33193316
TOut.emitRRX(Mips::LW, ATReg, GPReg, MCOperand::createExpr(GotExpr),
@@ -3324,8 +3321,7 @@ bool MipsAsmParser::emitPartialAddress(MipsTargetStreamer &TOut, SMLoc IDLoc,
33243321
}
33253322
} else { //!IsPicEnabled
33263323
const MCExpr *HiSym = MCSymbolRefExpr::create(Sym, getContext());
3327-
const MipsMCExpr *HiExpr =
3328-
MipsMCExpr::create(Mips::S_HI, HiSym, getContext());
3324+
const auto *HiExpr = MipsMCExpr::create(Mips::S_HI, HiSym, getContext());
33293325

33303326
// FIXME: This is technically correct but gives a different result to gas,
33313327
// but gas is incomplete there (it has a fixme noting it doesn't work with
@@ -3337,10 +3333,10 @@ bool MipsAsmParser::emitPartialAddress(MipsTargetStreamer &TOut, SMLoc IDLoc,
33373333
TOut.emitRX(Mips::LUi, ATReg, MCOperand::createExpr(HiExpr), IDLoc, STI);
33383334
} else { //isABI_N64()
33393335
const MCExpr *HighestSym = MCSymbolRefExpr::create(Sym, getContext());
3340-
const MipsMCExpr *HighestExpr =
3336+
const auto *HighestExpr =
33413337
MipsMCExpr::create(Mips::S_HIGHEST, HighestSym, getContext());
33423338
const MCExpr *HigherSym = MCSymbolRefExpr::create(Sym, getContext());
3343-
const MipsMCExpr *HigherExpr =
3339+
const auto *HigherExpr =
33443340
MipsMCExpr::create(Mips::S_HIGHER, HigherSym, getContext());
33453341

33463342
TOut.emitRX(Mips::LUi, ATReg, MCOperand::createExpr(HighestExpr), IDLoc,
@@ -3428,8 +3424,7 @@ bool MipsAsmParser::expandLoadSingleImmToFPR(MCInst &Inst, SMLoc IDLoc,
34283424

34293425
MCSymbol *Sym = getContext().createTempSymbol();
34303426
const MCExpr *LoSym = MCSymbolRefExpr::create(Sym, getContext());
3431-
const MipsMCExpr *LoExpr =
3432-
MipsMCExpr::create(Mips::S_LO, LoSym, getContext());
3427+
const auto *LoExpr = MipsMCExpr::create(Mips::S_LO, LoSym, getContext());
34333428

34343429
getStreamer().switchSection(ReadOnlySection);
34353430
getStreamer().emitLabel(Sym, IDLoc);
@@ -3479,8 +3474,7 @@ bool MipsAsmParser::expandLoadDoubleImmToGPR(MCInst &Inst, SMLoc IDLoc,
34793474

34803475
MCSymbol *Sym = getContext().createTempSymbol();
34813476
const MCExpr *LoSym = MCSymbolRefExpr::create(Sym, getContext());
3482-
const MipsMCExpr *LoExpr =
3483-
MipsMCExpr::create(Mips::S_LO, LoSym, getContext());
3477+
const auto *LoExpr = MipsMCExpr::create(Mips::S_LO, LoSym, getContext());
34843478

34853479
getStreamer().switchSection(ReadOnlySection);
34863480
getStreamer().emitLabel(Sym, IDLoc);
@@ -3560,8 +3554,7 @@ bool MipsAsmParser::expandLoadDoubleImmToFPR(MCInst &Inst, bool Is64FPU,
35603554

35613555
MCSymbol *Sym = getContext().createTempSymbol();
35623556
const MCExpr *LoSym = MCSymbolRefExpr::create(Sym, getContext());
3563-
const MipsMCExpr *LoExpr =
3564-
MipsMCExpr::create(Mips::S_LO, LoSym, getContext());
3557+
const auto *LoExpr = MipsMCExpr::create(Mips::S_LO, LoSym, getContext());
35653558

35663559
getStreamer().switchSection(ReadOnlySection);
35673560
getStreamer().emitLabel(Sym, IDLoc);
@@ -6353,7 +6346,7 @@ MCRegister MipsAsmParser::getReg(int RC, int RegNo) {
63536346
// e.g. "%lo foo", "(%lo(foo))", "%lo(foo)+1".
63546347
const MCExpr *MipsAsmParser::parseRelocExpr() {
63556348
auto getOp = [](StringRef Op) {
6356-
return StringSwitch<MipsMCExpr::Specifier>(Op)
6349+
return StringSwitch<Mips::Specifier>(Op)
63576350
.Case("call16", Mips::S_GOT_CALL)
63586351
.Case("call_hi", Mips::S_CALL_HI16)
63596352
.Case("call_lo", Mips::S_CALL_LO16)
@@ -6384,7 +6377,7 @@ const MCExpr *MipsAsmParser::parseRelocExpr() {
63846377
MCAsmParser &Parser = getParser();
63856378
StringRef Name;
63866379
const MCExpr *Res = nullptr;
6387-
SmallVector<MipsMCExpr::Specifier, 0> Ops;
6380+
SmallVector<Mips::Specifier, 0> Ops;
63886381
while (parseOptionalToken(AsmToken::Percent)) {
63896382
if (Parser.parseIdentifier(Name) ||
63906383
Parser.parseToken(AsmToken::LParen, "expected '('"))

‎llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -157,8 +157,8 @@ static void printImpl(const MCAsmInfo &MAI, raw_ostream &OS,
157157

158158
bool Mips::isGpOff(const MCSpecifierExpr &E) {
159159
if (E.getSpecifier() == Mips::S_HI || E.getSpecifier() == Mips::S_LO) {
160-
if (const MipsMCExpr *S1 = dyn_cast<const MipsMCExpr>(E.getSubExpr())) {
161-
if (const MipsMCExpr *S2 = dyn_cast<const MipsMCExpr>(S1->getSubExpr())) {
160+
if (const auto *S1 = dyn_cast<const MCSpecifierExpr>(E.getSubExpr())) {
161+
if (const auto *S2 = dyn_cast<const MCSpecifierExpr>(S1->getSubExpr())) {
162162
if (S1->getSpecifier() == Mips::S_NEG &&
163163
S2->getSpecifier() == Mips::S_GPREL) {
164164
// S = E.getSpecifier();
@@ -176,7 +176,8 @@ static bool evaluate(const MCSpecifierExpr &Expr, MCValue &Res,
176176
// special cases.
177177
if (Mips::isGpOff(Expr)) {
178178
const MCExpr *SubExpr =
179-
cast<MipsMCExpr>(cast<MipsMCExpr>(Expr.getSubExpr())->getSubExpr())
179+
cast<MCSpecifierExpr>(
180+
cast<MCSpecifierExpr>(Expr.getSubExpr())->getSubExpr())
180181
->getSubExpr();
181182
if (!SubExpr->evaluateAsRelocatable(Res, Asm))
182183
return false;

‎llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -45,6 +45,7 @@ class MipsCOFFMCAsmInfo : public MCAsmInfoGNUCOFF {
4545
};
4646

4747
namespace Mips {
48+
using Specifier = uint16_t;
4849
enum {
4950
S_None,
5051
S_CALL_HI16 = FirstTargetFixupKind,

‎llvm/lib/Target/Mips/MipsMCInstLower.cpp

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -35,7 +35,7 @@ void MipsMCInstLower::Initialize(MCContext *C) {
3535
MCOperand MipsMCInstLower::LowerSymbolOperand(const MachineOperand &MO,
3636
MachineOperandType MOTy,
3737
int64_t Offset) const {
38-
MipsMCExpr::Specifier TargetKind = Mips::S_None;
38+
Mips::Specifier TargetKind = Mips::S_None;
3939
bool IsGpOff = false;
4040
const MCSymbol *Symbol;
4141
SmallString<128> Name;
@@ -211,7 +211,7 @@ MCOperand MipsMCInstLower::LowerOperand(const MachineOperand &MO,
211211

212212
MCOperand MipsMCInstLower::createSub(MachineBasicBlock *BB1,
213213
MachineBasicBlock *BB2,
214-
MipsMCExpr::Specifier Kind) const {
214+
Mips::Specifier Kind) const {
215215
const MCSymbolRefExpr *Sym1 = MCSymbolRefExpr::create(BB1->getSymbol(), *Ctx);
216216
const MCSymbolRefExpr *Sym2 = MCSymbolRefExpr::create(BB2->getSymbol(), *Ctx);
217217
const MCBinaryExpr *Sub = MCBinaryExpr::createSub(Sym1, Sym2, *Ctx);
@@ -226,7 +226,7 @@ lowerLongBranchLUi(const MachineInstr *MI, MCInst &OutMI) const {
226226
// Lower register operand.
227227
OutMI.addOperand(LowerOperand(MI->getOperand(0)));
228228

229-
MipsMCExpr::Specifier Spec;
229+
Mips::Specifier Spec;
230230
unsigned TargetFlags = MI->getOperand(1).getTargetFlags();
231231
switch (TargetFlags) {
232232
case MipsII::MO_HIGHEST:
@@ -248,7 +248,7 @@ lowerLongBranchLUi(const MachineInstr *MI, MCInst &OutMI) const {
248248
if (MI->getNumOperands() == 2) {
249249
const MCExpr *Expr =
250250
MCSymbolRefExpr::create(MI->getOperand(1).getMBB()->getSymbol(), *Ctx);
251-
const MipsMCExpr *MipsExpr = MipsMCExpr::create(Spec, Expr, *Ctx);
251+
const auto *MipsExpr = MipsMCExpr::create(Spec, Expr, *Ctx);
252252
OutMI.addOperand(MCOperand::createExpr(MipsExpr));
253253
} else if (MI->getNumOperands() == 3) {
254254
// Create %hi($tgt-$baltgt).
@@ -261,7 +261,7 @@ void MipsMCInstLower::lowerLongBranchADDiu(const MachineInstr *MI,
261261
MCInst &OutMI, int Opcode) const {
262262
OutMI.setOpcode(Opcode);
263263

264-
MipsMCExpr::Specifier Spec;
264+
Mips::Specifier Spec;
265265
unsigned TargetFlags = MI->getOperand(2).getTargetFlags();
266266
switch (TargetFlags) {
267267
case MipsII::MO_HIGHEST:
@@ -290,7 +290,7 @@ void MipsMCInstLower::lowerLongBranchADDiu(const MachineInstr *MI,
290290
// Lower register operand.
291291
const MCExpr *Expr =
292292
MCSymbolRefExpr::create(MI->getOperand(2).getMBB()->getSymbol(), *Ctx);
293-
const MipsMCExpr *MipsExpr = MipsMCExpr::create(Spec, Expr, *Ctx);
293+
const auto *MipsExpr = MipsMCExpr::create(Spec, Expr, *Ctx);
294294
OutMI.addOperand(MCOperand::createExpr(MipsExpr));
295295
} else if (MI->getNumOperands() == 4) {
296296
// Create %lo($tgt-$baltgt) or %hi($tgt-$baltgt).

‎llvm/lib/Target/Mips/MipsMCInstLower.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@
99
#ifndef LLVM_LIB_TARGET_MIPS_MIPSMCINSTLOWER_H
1010
#define LLVM_LIB_TARGET_MIPS_MIPSMCINSTLOWER_H
1111

12-
#include "MCTargetDesc/MipsMCExpr.h"
12+
#include "MCTargetDesc/MipsMCAsmInfo.h"
1313
#include "llvm/CodeGen/MachineOperand.h"
1414
#include "llvm/Support/Compiler.h"
1515

@@ -41,7 +41,7 @@ class LLVM_LIBRARY_VISIBILITY MipsMCInstLower {
4141
MCOperand LowerSymbolOperand(const MachineOperand &MO,
4242
MachineOperandType MOTy, int64_t Offset) const;
4343
MCOperand createSub(MachineBasicBlock *BB1, MachineBasicBlock *BB2,
44-
MipsMCExpr::Specifier Kind) const;
44+
Mips::Specifier Kind) const;
4545
void lowerLongBranchLUi(const MachineInstr *MI, MCInst &OutMI) const;
4646
void lowerLongBranchADDiu(const MachineInstr *MI, MCInst &OutMI,
4747
int Opcode) const;

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