address comment

Author: diggerlin

llvm/include/llvm/CodeGen/SelectionDAG.h

@@ -1253,6 +1253,9 @@ class SelectionDAG {
   /// stack arguments from being clobbered.
   LLVM_ABI SDValue getStackArgumentTokenFactor(SDValue Chain);
 
+  std::pair<SDValue, SDValue> getMemcmp(SDValue Chain, const SDLoc &dl,
+                                        SDValue Dst, SDValue Src, SDValue Size,
+                                        const CallInst *CI);
   /* \p CI if not null is the memset call being lowered.
    * \p OverrideTailCall is an optional parameter that can be used to override
    * the tail call optimization decision. */

llvm/include/llvm/CodeGen/SelectionDAGTargetInfo.h

@@ -24,7 +24,7 @@
 namespace llvm {
 
 class SelectionDAG;
-
+class CallInst;
 //===----------------------------------------------------------------------===//
 /// Targets can subclass this to parameterize the
 /// SelectionDAG lowering and instruction selection process.
@@ -118,8 +118,7 @@ class SelectionDAGTargetInfo {
   virtual std::pair<SDValue, SDValue>
   EmitTargetCodeForMemcmp(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain,
                           SDValue Op1, SDValue Op2, SDValue Op3,
-                          MachinePointerInfo Op1PtrInfo,
-                          MachinePointerInfo Op2PtrInfo) const {
+                          const CallInst *CI) const {
     return std::make_pair(SDValue(), SDValue());
   }
 

llvm/include/llvm/IR/RuntimeLibcalls.td

@@ -241,6 +241,7 @@ foreach FPTy = ["F32", "F64", "F128", "PPCF128"] in {
 }
 
 // Memory
+def MEMCMP : RuntimeLibcall;
 def MEMCPY : RuntimeLibcall;
 def MEMMOVE : RuntimeLibcall;
 def MEMSET : RuntimeLibcall;
@@ -1485,11 +1486,13 @@ def __gtkf2 : PPCRuntimeLibcallImpl<OGT_F128>;
 def __unordkf2 : PPCRuntimeLibcallImpl<UO_F128>;
 
 // PPC64 && Subtarget.isAIXABI()
+def ___memcmp64 : RuntimeLibcallImpl<MEMCPY>;
 def ___memmove64 : RuntimeLibcallImpl<MEMCPY>;
 def ___memset64 : RuntimeLibcallImpl<MEMSET>;
 def ___bzero64 : RuntimeLibcallImpl<BZERO>;
 
 // !PPC64 && Subtarget.isAIXABI()
+def ___memcmp : RuntimeLibcallImpl<MEMCMP>;
 def ___memmove : RuntimeLibcallImpl<MEMMOVE>;
 def ___memset : RuntimeLibcallImpl<MEMSET>;
 def ___bzero : RuntimeLibcallImpl<BZERO>;

llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

@@ -8743,6 +8743,45 @@ static void checkAddrSpaceIsValidForLibcall(const TargetLowering *TLI,
                        Twine(AS));
   }
 }
+std::pair<SDValue, SDValue>
+SelectionDAG::getMemcmp(SDValue Chain, const SDLoc &dl, SDValue Mem0,
+                        SDValue Mem1, SDValue Size, const CallInst *CI) {
+
+  const char *LibCallName = TLI->getLibcallName(RTLIB::MEMCMP);
+  if (LibCallName == nullptr)
+    return std::make_pair(SDValue(), SDValue());
+  // Emit a library call.
+  TargetLowering::ArgListTy Args;
+  TargetLowering::ArgListEntry Entry;
+  Entry.Ty = PointerType::getUnqual(*getContext());
+  Entry.Node = Mem0;
+  Args.push_back(Entry);
+  Entry.Node = Mem1;
+  Args.push_back(Entry);
+
+  Entry.Ty = getDataLayout().getIntPtrType(*getContext());
+  Entry.Node = Size;
+  Args.push_back(Entry);
+
+  // FIXME: pass in SDLoc
+  TargetLowering::CallLoweringInfo CLI(*this);
+  bool IsTailCall = false;
+  bool ReturnsFirstArg = CI && funcReturnsFirstArgOfCall(*CI);
+  IsTailCall = CI && CI->isTailCall() &&
+               isInTailCallPosition(*CI, getTarget(), ReturnsFirstArg);
+
+  CLI.setDebugLoc(dl)
+      .setChain(Chain)
+      .setLibCallee(
+          TLI->getLibcallCallingConv(RTLIB::MEMCMP),
+          Type::getInt32Ty(*getContext()),
+          getExternalSymbol(LibCallName, TLI->getPointerTy(getDataLayout())),
+          std::move(Args))
+      .setTailCall(IsTailCall);
+
+  std::pair<SDValue, SDValue> CallResult = TLI->LowerCallTo(CLI);
+  return CallResult;
+}
 
 SDValue SelectionDAG::getMemcpy(
     SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src, SDValue Size,

llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

@@ -9056,7 +9056,7 @@ bool SelectionDAGBuilder::visitMemCmpBCmpCall(const CallInst &I) {
   const SelectionDAGTargetInfo &TSI = DAG.getSelectionDAGInfo();
   std::pair<SDValue, SDValue> Res = TSI.EmitTargetCodeForMemcmp(
       DAG, getCurSDLoc(), DAG.getRoot(), getValue(LHS), getValue(RHS),
-      getValue(Size), MachinePointerInfo(LHS), MachinePointerInfo(RHS));
+      getValue(Size), &I);
   if (Res.first.getNode()) {
     processIntegerCallValue(I, Res.first, true);
     PendingLoads.push_back(Res.second);

llvm/lib/IR/RuntimeLibcalls.cpp

@@ -376,11 +376,13 @@ void RuntimeLibcallsInfo::initLibcalls(const Triple &TT,
     // TODO: Tablegen predicate support
     if (TT.isOSAIX()) {
       if (TT.isPPC64()) {
+        setLibcallImpl(RTLIB::MEMCMP, RTLIB::___memcmp64);
         setLibcallImpl(RTLIB::MEMCPY, RTLIB::Unsupported);
         setLibcallImpl(RTLIB::MEMMOVE, RTLIB::___memmove64);
         setLibcallImpl(RTLIB::MEMSET, RTLIB::___memset64);
         setLibcallImpl(RTLIB::BZERO, RTLIB::___bzero64);
       } else {
+        setLibcallImpl(RTLIB::MEMCMP, RTLIB::___memcmp);
         setLibcallImpl(RTLIB::MEMCPY, RTLIB::Unsupported);
         setLibcallImpl(RTLIB::MEMMOVE, RTLIB::___memmove);
         setLibcallImpl(RTLIB::MEMSET, RTLIB::___memset);

llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.cpp

@@ -22,3 +22,9 @@ bool PPCSelectionDAGInfo::isTargetStrictFPOpcode(unsigned Opcode) const {
   return Opcode >= PPCISD::FIRST_STRICTFP_OPCODE &&
          Opcode <= PPCISD::LAST_STRICTFP_OPCODE;
 }
+
+std::pair<SDValue, SDValue> PPCSelectionDAGInfo::EmitTargetCodeForMemcmp(
+    SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2,
+    SDValue Op3, const CallInst *CI) const {
+  return DAG.getMemcmp(Chain, dl, Op1, Op2, Op3, CI);
+}

llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.h

@@ -20,6 +20,11 @@ class PPCSelectionDAGInfo : public SelectionDAGTargetInfo {
   bool isTargetMemoryOpcode(unsigned Opcode) const override;
 
   bool isTargetStrictFPOpcode(unsigned Opcode) const override;
+
+  std::pair<SDValue, SDValue>
+  EmitTargetCodeForMemcmp(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain,
+                          SDValue Op1, SDValue Op2, SDValue Op3,
+                          const CallInst *CI) const;
 };
 
 } // namespace llvm

llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp

@@ -181,8 +181,7 @@ static SDValue addIPMSequence(const SDLoc &DL, SDValue CCReg,
 
 std::pair<SDValue, SDValue> SystemZSelectionDAGInfo::EmitTargetCodeForMemcmp(
     SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src1,
-    SDValue Src2, SDValue Size, MachinePointerInfo Op1PtrInfo,
-    MachinePointerInfo Op2PtrInfo) const {
+    SDValue Src2, SDValue Size, const CallInst *CI) const {
   SDValue CCReg;
   // Swap operands to invert CC == 1 vs. CC == 2 cases.
   if (auto *CSize = dyn_cast<ConstantSDNode>(Size)) {

llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h

@@ -41,8 +41,7 @@ class SystemZSelectionDAGInfo : public SelectionDAGTargetInfo {
   std::pair<SDValue, SDValue>
   EmitTargetCodeForMemcmp(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain,
                           SDValue Src1, SDValue Src2, SDValue Size,
-                          MachinePointerInfo Op1PtrInfo,
-                          MachinePointerInfo Op2PtrInfo) const override;
+                          const CallInst *CI) const override;
 
   std::pair<SDValue, SDValue>
   EmitTargetCodeForMemchr(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain,