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Revert "[X86] Support -march=diamondrapids (#113881)" (#116563)
This reverts commit 826b845.
1 parent 826b845 commit 90e9223

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‎clang/docs/ReleaseNotes.rst

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Original file line numberDiff line numberDiff line change
@@ -769,8 +769,6 @@ X86 Support
769769
- Support ISA of ``AMX-TF32``.
770770
- Support ISA of ``MOVRS``.
771771

772-
- Supported ``-march/tune=diamondrapids``
773-
774772
Arm and AArch64 Support
775773
^^^^^^^^^^^^^^^^^^^^^^^
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‎clang/lib/Basic/Targets/X86.cpp

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@@ -667,7 +667,6 @@ void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
667667
case CK_GraniterapidsD:
668668
case CK_Emeraldrapids:
669669
case CK_Clearwaterforest:
670-
case CK_Diamondrapids:
671670
// FIXME: Historically, we defined this legacy name, it would be nice to
672671
// remove it at some point. We've never exposed fine-grained names for
673672
// recent primary x86 CPUs, and we should keep it that way.
@@ -1652,7 +1651,6 @@ std::optional<unsigned> X86TargetInfo::getCPUCacheLineSize() const {
16521651
case CK_GraniterapidsD:
16531652
case CK_Emeraldrapids:
16541653
case CK_Clearwaterforest:
1655-
case CK_Diamondrapids:
16561654
case CK_KNL:
16571655
case CK_KNM:
16581656
// K7

‎clang/test/CodeGen/attr-cpuspecific-cpus.c

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Original file line numberDiff line numberDiff line change
@@ -43,7 +43,6 @@ ATTR(cpu_specific(icelake_client)) void CPU(void){}
4343
ATTR(cpu_specific(tigerlake)) void CPU(void){}
4444
ATTR(cpu_specific(alderlake)) void CPU(void){}
4545
ATTR(cpu_specific(sapphirerapids)) void CPU(void){}
46-
ATTR(cpu_specific(diamondrapids)) void CPU(void){}
4746

4847
// ALIAS CPUs
4948
ATTR(cpu_specific(pentium_iii_no_xmm_regs)) void CPU0(void){}

‎clang/test/CodeGen/attr-target-mv.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -29,7 +29,6 @@ int __attribute__((target("arch=lunarlake"))) foo(void) {return 23;}
2929
int __attribute__((target("arch=gracemont"))) foo(void) {return 24;}
3030
int __attribute__((target("arch=pantherlake"))) foo(void) {return 25;}
3131
int __attribute__((target("arch=clearwaterforest"))) foo(void) {return 26;}
32-
int __attribute__((target("arch=diamondrapids"))) foo(void) {return 27;}
3332
int __attribute__((target("default"))) foo(void) { return 2; }
3433

3534
int bar(void) {

‎clang/test/CodeGen/target-builtin-noerror.c

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Original file line numberDiff line numberDiff line change
@@ -209,5 +209,4 @@ void verifycpustrings(void) {
209209
(void)__builtin_cpu_is("znver3");
210210
(void)__builtin_cpu_is("znver4");
211211
(void)__builtin_cpu_is("znver5");
212-
(void)__builtin_cpu_is("diamondrapids");
213212
}

‎clang/test/Driver/x86-march.c

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Original file line numberDiff line numberDiff line change
@@ -120,10 +120,6 @@
120120
// RUN: | FileCheck %s -check-prefix=clearwaterforest
121121
// clearwaterforest: "-target-cpu" "clearwaterforest"
122122
//
123-
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=diamondrapids 2>&1 \
124-
// RUN: | FileCheck %s -check-prefix=diamondrapids
125-
// diamondrapids: "-target-cpu" "diamondrapids"
126-
//
127123
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=lakemont 2>&1 \
128124
// RUN: | FileCheck %s -check-prefix=lakemont
129125
// lakemont: "-target-cpu" "lakemont"

‎clang/test/Misc/target-invalid-cpu-note/x86.c

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@@ -69,7 +69,6 @@
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// X86-SAME: {{^}}, graniterapids-d
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// X86-SAME: {{^}}, emeraldrapids
7171
// X86-SAME: {{^}}, clearwaterforest
72-
// X86-SAME: {{^}}, diamondrapids
7372
// X86-SAME: {{^}}, knl
7473
// X86-SAME: {{^}}, knm
7574
// X86-SAME: {{^}}, lakemont
@@ -156,7 +155,6 @@
156155
// X86_64-SAME: {{^}}, graniterapids-d
157156
// X86_64-SAME: {{^}}, emeraldrapids
158157
// X86_64-SAME: {{^}}, clearwaterforest
159-
// X86_64-SAME: {{^}}, diamondrapids
160158
// X86_64-SAME: {{^}}, knl
161159
// X86_64-SAME: {{^}}, knm
162160
// X86_64-SAME: {{^}}, k8
@@ -252,7 +250,6 @@
252250
// TUNE_X86-SAME: {{^}}, graniterapids-d
253251
// TUNE_X86-SAME: {{^}}, emeraldrapids
254252
// TUNE_X86-SAME: {{^}}, clearwaterforest
255-
// TUNE_X86-SAME: {{^}}, diamondrapids
256253
// TUNE_X86-SAME: {{^}}, knl
257254
// TUNE_X86-SAME: {{^}}, knm
258255
// TUNE_X86-SAME: {{^}}, lakemont
@@ -355,7 +352,6 @@
355352
// TUNE_X86_64-SAME: {{^}}, graniterapids-d
356353
// TUNE_X86_64-SAME: {{^}}, emeraldrapids
357354
// TUNE_X86_64-SAME: {{^}}, clearwaterforest
358-
// TUNE_X86_64-SAME: {{^}}, diamondrapids
359355
// TUNE_X86_64-SAME: {{^}}, knl
360356
// TUNE_X86_64-SAME: {{^}}, knm
361357
// TUNE_X86_64-SAME: {{^}}, lakemont

‎clang/test/Preprocessor/predefined-arch-macros.c

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@@ -1867,23 +1867,13 @@
18671867
// RUN: %clang -march=graniterapids-d -m32 -E -dM %s -o - 2>&1 \
18681868
// RUN: --target=i386 \
18691869
// RUN: | FileCheck -match-full-lines %s -check-prefixes=CHECK_GNR_M32,CHECK_GNRD_M32
1870-
// RUN: %clang -march=diamondrapids -m32 -E -dM %s -o - 2>&1 \
1871-
// RUN: --target=i386 \
1872-
// RUN: | FileCheck -match-full-lines %s -check-prefixes=CHECK_GNR_M32,CHECK_GNRD_M32,CHECK_DMR_M32
18731870
// CHECK_GNR_M32: #define __AES__ 1
1874-
// CHECK_DMR_M32: #define __AMX_AVX512__ 1
18751871
// CHECK_GNR_M32: #define __AMX_BF16__ 1
18761872
// CHECK_GNR_M32-NOT: #define __AMX_COMPLEX__ 1
18771873
// CHECK_GNRD_M32: #define __AMX_COMPLEX__ 1
18781874
// CHECK_GNR_M32: #define __AMX_FP16__ 1
1879-
// CHECK_DMR_M32: #define __AMX_FP8__ 1
18801875
// CHECK_GNR_M32: #define __AMX_INT8__ 1
1881-
// CHECK_DMR_M32: #define __AMX_MOVRS__ 1
1882-
// CHECK_DMR_M32: #define __AMX_TF32__ 1
18831876
// CHECK_GNR_M32: #define __AMX_TILE__ 1
1884-
// CHECK_DMR_M32: #define __AMX_TRANSPOSE__ 1
1885-
// CHECK_DMR_M32: #define __AVX10_2_512__ 1
1886-
// CHECK_DMR_M32: #define __AVX10_2__ 1
18871877
// CHECK_GNR_M32: #define __AVX2__ 1
18881878
// CHECK_GNR_M32: #define __AVX512BF16__ 1
18891879
// CHECK_GNR_M32: #define __AVX512BITALG__ 1
@@ -1898,21 +1888,13 @@
18981888
// CHECK_GNR_M32: #define __AVX512VL__ 1
18991889
// CHECK_GNR_M32: #define __AVX512VNNI__ 1
19001890
// CHECK_GNR_M32: #define __AVX512VPOPCNTDQ__ 1
1901-
// CHECK_DMR_M32: #define __AVXIFMA__ 1
1902-
// CHECK_DMR_M32: #define __AVXNECONVERT__ 1
1903-
// CHECK_DMR_M32: #define __AVXVNNIINT16__ 1
1904-
// CHECK_DMR_M32: #define __AVXVNNIINT8__ 1
19051891
// CHECK_GNR_M32: #define __AVXVNNI__ 1
19061892
// CHECK_GNR_M32: #define __AVX__ 1
19071893
// CHECK_GNR_M32: #define __BMI2__ 1
19081894
// CHECK_GNR_M32: #define __BMI__ 1
1909-
// CHECK_DMR_M32: #define __CCMP__ 1
1910-
// CHECK_DMR_M32: #define __CF__ 1
19111895
// CHECK_GNR_M32: #define __CLDEMOTE__ 1
19121896
// CHECK_GNR_M32: #define __CLFLUSHOPT__ 1
19131897
// CHECK_GNR_M32: #define __CLWB__ 1
1914-
// CHECK_DMR_M32: #define __CMPCCXADD__ 1
1915-
// CHECK_DMR_M32: #define __EGPR__ 1
19161898
// CHECK_GNR_M32: #define __ENQCMD__ 1
19171899
// CHECK_GNR_M32: #define __EVEX256__ 1
19181900
// CHECK_GNR_M32: #define __EVEX512__ 1
@@ -1923,28 +1905,20 @@
19231905
// CHECK_GNR_M32: #define __LZCNT__ 1
19241906
// CHECK_GNR_M32: #define __MMX__ 1
19251907
// CHECK_GNR_M32: #define __MOVBE__ 1
1926-
// CHECK_DMR_M32: #define __MOVRS__ 1
1927-
// CHECK_DMR_M32: #define __NDD__ 1
1928-
// CHECK_DMR_M32: #define __NF__ 1
19291908
// CHECK_GNR_M32: #define __PCLMUL__ 1
19301909
// CHECK_GNR_M32: #define __PCONFIG__ 1
19311910
// CHECK_GNR_M32: #define __PKU__ 1
19321911
// CHECK_GNR_M32: #define __POPCNT__ 1
1933-
// CHECK_DMR_M32: #define __PPX__ 1
19341912
// CHECK_GNR_M32: #define __PREFETCHI__ 1
19351913
// CHECK_GNR_M32: #define __PRFCHW__ 1
19361914
// CHECK_GNR_M32: #define __PTWRITE__ 1
1937-
// CHECK_DMR_M32: #define __PUSH2POP2__ 1
19381915
// CHECK_GNR_M32: #define __RDPID__ 1
19391916
// CHECK_GNR_M32: #define __RDRND__ 1
19401917
// CHECK_GNR_M32: #define __RDSEED__ 1
19411918
// CHECK_GNR_M32: #define __SERIALIZE__ 1
19421919
// CHECK_GNR_M32: #define __SGX__ 1
1943-
// CHECK_DMR_M32: #define __SHA512__ 1
19441920
// CHECK_GNR_M32: #define __SHA__ 1
19451921
// CHECK_GNR_M32: #define __SHSTK__ 1
1946-
// CHECK_DMR_M32: #define __SM3__ 1
1947-
// CHECK_DMR_M32: #define __SM4__ 1
19481922
// CHECK_GNR_M32: #define __SSE2__ 1
19491923
// CHECK_GNR_M32: #define __SSE3__ 1
19501924
// CHECK_GNR_M32: #define __SSE4_1__ 1
@@ -1961,7 +1935,6 @@
19611935
// CHECK_GNR_M32: #define __XSAVEOPT__ 1
19621936
// CHECK_GNR_M32: #define __XSAVES__ 1
19631937
// CHECK_GNR_M32: #define __XSAVE__ 1
1964-
// CHECK_DMR_M32: #define __ZU__ 1
19651938
// CHECK_GNR_M32: #define __corei7 1
19661939
// CHECK_GNR_M32: #define __corei7__ 1
19671940
// CHECK_GNR_M32: #define __i386 1
@@ -1975,23 +1948,13 @@
19751948
// RUN: %clang -march=graniterapids-d -m64 -E -dM %s -o - 2>&1 \
19761949
// RUN: --target=x86_64 \
19771950
// RUN: | FileCheck -match-full-lines %s -check-prefixes=CHECK_GNR_M64,CHECK_GNRD_M64
1978-
// RUN: %clang -march=diamondrapids -m64 -E -dM %s -o - 2>&1 \
1979-
// RUN: --target=x86_64 \
1980-
// RUN: | FileCheck -match-full-lines %s -check-prefixes=CHECK_GNR_M64,CHECK_GNRD_M64,CHECK_DMR_M64
19811951
// CHECK_GNR_M64: #define __AES__ 1
1982-
// CHECK_DMR_M64: #define __AMX_AVX512__ 1
19831952
// CHECK_GNR_M64: #define __AMX_BF16__ 1
19841953
// CHECK_GNR_M64-NOT: #define __AMX_COMPLEX__ 1
19851954
// CHECK_GNRD_M64: #define __AMX_COMPLEX__ 1
19861955
// CHECK_GNR_M64: #define __AMX_FP16__ 1
1987-
// CHECK_DMR_M64: #define __AMX_FP8__ 1
19881956
// CHECK_GNR_M64: #define __AMX_INT8__ 1
1989-
// CHECK_DMR_M64: #define __AMX_MOVRS__ 1
1990-
// CHECK_DMR_M64: #define __AMX_TF32__ 1
19911957
// CHECK_GNR_M64: #define __AMX_TILE__ 1
1992-
// CHECK_DMR_M64: #define __AMX_TRANSPOSE__ 1
1993-
// CHECK_DMR_M64: #define __AVX10_2_512__ 1
1994-
// CHECK_DMR_M64: #define __AVX10_2__ 1
19951958
// CHECK_GNR_M64: #define __AVX2__ 1
19961959
// CHECK_GNR_M64: #define __AVX512BF16__ 1
19971960
// CHECK_GNR_M64: #define __AVX512BITALG__ 1
@@ -2006,21 +1969,13 @@
20061969
// CHECK_GNR_M64: #define __AVX512VL__ 1
20071970
// CHECK_GNR_M64: #define __AVX512VNNI__ 1
20081971
// CHECK_GNR_M64: #define __AVX512VPOPCNTDQ__ 1
2009-
// CHECK_DMR_M64: #define __AVXIFMA__ 1
2010-
// CHECK_DMR_M64: #define __AVXNECONVERT__ 1
2011-
// CHECK_DMR_M64: #define __AVXVNNIINT16__ 1
2012-
// CHECK_DMR_M64: #define __AVXVNNIINT8__ 1
20131972
// CHECK_GNR_M64: #define __AVXVNNI__ 1
20141973
// CHECK_GNR_M64: #define __AVX__ 1
20151974
// CHECK_GNR_M64: #define __BMI2__ 1
20161975
// CHECK_GNR_M64: #define __BMI__ 1
2017-
// CHECK_DMR_M64: #define __CCMP__ 1
2018-
// CHECK_DMR_M64: #define __CF__ 1
20191976
// CHECK_GNR_M64: #define __CLDEMOTE__ 1
20201977
// CHECK_GNR_M64: #define __CLFLUSHOPT__ 1
20211978
// CHECK_GNR_M64: #define __CLWB__ 1
2022-
// CHECK_DMR_M64: #define __CMPCCXADD__ 1
2023-
// CHECK_DMR_M64: #define __EGPR__ 1
20241979
// CHECK_GNR_M64: #define __ENQCMD__ 1
20251980
// CHECK_GNR_M64: #define __EVEX256__ 1
20261981
// CHECK_GNR_M64: #define __EVEX512__ 1
@@ -2031,28 +1986,20 @@
20311986
// CHECK_GNR_M64: #define __LZCNT__ 1
20321987
// CHECK_GNR_M64: #define __MMX__ 1
20331988
// CHECK_GNR_M64: #define __MOVBE__ 1
2034-
// CHECK_DMR_M64: #define __MOVRS__ 1
2035-
// CHECK_DMR_M64: #define __NDD__ 1
2036-
// CHECK_DMR_M64: #define __NF__ 1
20371989
// CHECK_GNR_M64: #define __PCLMUL__ 1
20381990
// CHECK_GNR_M64: #define __PCONFIG__ 1
20391991
// CHECK_GNR_M64: #define __PKU__ 1
20401992
// CHECK_GNR_M64: #define __POPCNT__ 1
2041-
// CHECK_DMR_M64: #define __PPX__ 1
20421993
// CHECK_GNR_M64: #define __PREFETCHI__ 1
20431994
// CHECK_GNR_M64: #define __PRFCHW__ 1
20441995
// CHECK_GNR_M64: #define __PTWRITE__ 1
2045-
// CHECK_DMR_M64: #define __PUSH2POP2__ 1
20461996
// CHECK_GNR_M64: #define __RDPID__ 1
20471997
// CHECK_GNR_M64: #define __RDRND__ 1
20481998
// CHECK_GNR_M64: #define __RDSEED__ 1
20491999
// CHECK_GNR_M64: #define __SERIALIZE__ 1
20502000
// CHECK_GNR_M64: #define __SGX__ 1
2051-
// CHECK_DMR_M64: #define __SHA512__ 1
20522001
// CHECK_GNR_M64: #define __SHA__ 1
20532002
// CHECK_GNR_M64: #define __SHSTK__ 1
2054-
// CHECK_DMR_M64: #define __SM3__ 1
2055-
// CHECK_DMR_M64: #define __SM4__ 1
20562003
// CHECK_GNR_M64: #define __SSE2__ 1
20572004
// CHECK_GNR_M64: #define __SSE3__ 1
20582005
// CHECK_GNR_M64: #define __SSE4_1__ 1
@@ -2069,7 +2016,6 @@
20692016
// CHECK_GNR_M64: #define __XSAVEOPT__ 1
20702017
// CHECK_GNR_M64: #define __XSAVES__ 1
20712018
// CHECK_GNR_M64: #define __XSAVE__ 1
2072-
// CHECK_DMR_M64: #define __ZU__ 1
20732019
// CHECK_GNR_M64: #define __amd64 1
20742020
// CHECK_GNR_M64: #define __amd64__ 1
20752021
// CHECK_GNR_M64: #define __corei7 1

‎compiler-rt/lib/builtins/cpu_model/x86.c

Lines changed: 0 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -103,7 +103,6 @@ enum ProcessorSubtypes {
103103
INTEL_COREI7_ARROWLAKE_S,
104104
INTEL_COREI7_PANTHERLAKE,
105105
AMDFAM1AH_ZNVER5,
106-
INTEL_COREI7_DIAMONDRAPIDS,
107106
CPU_SUBTYPE_MAX
108107
};
109108

@@ -601,19 +600,6 @@ static const char *getIntelProcessorTypeAndSubtype(unsigned Family,
601600
break;
602601
}
603602
break;
604-
case 19:
605-
switch (Model) {
606-
// Diamond Rapids:
607-
case 0x01:
608-
CPU = "diamondrapids";
609-
*Type = INTEL_COREI7;
610-
*Subtype = INTEL_COREI7_DIAMONDRAPIDS;
611-
break;
612-
613-
default: // Unknown family 19 CPU.
614-
break;
615-
}
616-
break;
617603
default:
618604
break; // Unknown.
619605
}

‎llvm/docs/ReleaseNotes.md

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@@ -237,8 +237,6 @@ Changes to the X86 Backend
237237

238238
* Supported ISA of `MSR_IMM`.
239239

240-
* Supported ``-mcpu=diamondrapids``
241-
242240
Changes to the OCaml bindings
243241
-----------------------------
244242

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