|
38 | 38 | #include "llvm/IR/DebugLoc.h"
|
39 | 39 | #include "llvm/IR/FMF.h"
|
40 | 40 | #include "llvm/IR/Operator.h"
|
| 41 | +#include "llvm/Support/Compiler.h" |
41 | 42 | #include "llvm/Support/InstructionCost.h"
|
42 | 43 | #include <algorithm>
|
43 | 44 | #include <cassert>
|
@@ -77,7 +78,7 @@ using VPlanPtr = std::unique_ptr<VPlan>;
|
77 | 78 |
|
78 | 79 | /// VPBlockBase is the building block of the Hierarchical Control-Flow Graph.
|
79 | 80 | /// A VPBlockBase can be either a VPBasicBlock or a VPRegionBlock.
|
80 |
| -class VPBlockBase { |
| 81 | +class LLVM_ABI VPBlockBase { |
81 | 82 | friend class VPBlockUtils;
|
82 | 83 |
|
83 | 84 | const unsigned char SubclassID; ///< Subclass identifier (for isa/dyn_cast).
|
@@ -384,7 +385,7 @@ class VPBlockBase {
|
384 | 385 | /// and is responsible for deleting its defined values. Single-value
|
385 | 386 | /// recipes must inherit from VPSingleDef instead of inheriting from both
|
386 | 387 | /// VPRecipeBase and VPValue separately.
|
387 |
| -class VPRecipeBase : public ilist_node_with_parent<VPRecipeBase, VPBasicBlock>, |
| 388 | +class LLVM_ABI VPRecipeBase : public ilist_node_with_parent<VPRecipeBase, VPBasicBlock>, |
388 | 389 | public VPDef,
|
389 | 390 | public VPUser {
|
390 | 391 | friend VPBasicBlock;
|
@@ -635,7 +636,7 @@ class VPIRFlags {
|
635 | 636 | char AllowContract : 1;
|
636 | 637 | char ApproxFunc : 1;
|
637 | 638 |
|
638 |
| - FastMathFlagsTy(const FastMathFlags &FMF); |
| 639 | + LLVM_ABI FastMathFlagsTy(const FastMathFlags &FMF); |
639 | 640 | };
|
640 | 641 |
|
641 | 642 | OperationType OpType;
|
@@ -787,7 +788,7 @@ class VPIRFlags {
|
787 | 788 | /// Returns true if the recipe has fast-math flags.
|
788 | 789 | bool hasFastMathFlags() const { return OpType == OperationType::FPMathOp; }
|
789 | 790 |
|
790 |
| - FastMathFlags getFastMathFlags() const; |
| 791 | + LLVM_ABI FastMathFlags getFastMathFlags() const; |
791 | 792 |
|
792 | 793 | /// Returns true if the recipe has non-negative flag.
|
793 | 794 | bool hasNonNegFlag() const { return OpType == OperationType::NonNegOp; }
|
@@ -872,7 +873,7 @@ struct VPRecipeWithIRFlags : public VPSingleDefRecipe, public VPIRFlags {
|
872 | 873 |
|
873 | 874 | /// Helper to access the operand that contains the unroll part for this recipe
|
874 | 875 | /// after unrolling.
|
875 |
| -template <unsigned PartOpIdx> class VPUnrollPartAccessor { |
| 876 | +template <unsigned PartOpIdx> class LLVM_ABI VPUnrollPartAccessor { |
876 | 877 | protected:
|
877 | 878 | /// Return the VPValue operand containing the unroll part or null if there is
|
878 | 879 | /// no such operand.
|
@@ -914,7 +915,7 @@ class VPIRMetadata {
|
914 | 915 | /// While as any Recipe it may generate a sequence of IR instructions when
|
915 | 916 | /// executed, these instructions would always form a single-def expression as
|
916 | 917 | /// the VPInstruction is also a single def-use vertex.
|
917 |
| -class VPInstruction : public VPRecipeWithIRFlags, |
| 918 | +class LLVM_ABI VPInstruction : public VPRecipeWithIRFlags, |
918 | 919 | public VPIRMetadata,
|
919 | 920 | public VPUnrollPartAccessor<1> {
|
920 | 921 | friend class VPlanSlp;
|
@@ -1187,7 +1188,7 @@ class VPPhiAccessors {
|
1187 | 1188 | #endif
|
1188 | 1189 | };
|
1189 | 1190 |
|
1190 |
| -struct VPPhi : public VPInstruction, public VPPhiAccessors { |
| 1191 | +struct LLVM_ABI VPPhi : public VPInstruction, public VPPhiAccessors { |
1191 | 1192 | VPPhi(ArrayRef<VPValue *> Operands, DebugLoc DL, const Twine &Name = "")
|
1192 | 1193 | : VPInstruction(Instruction::PHI, Operands, DL, Name) {}
|
1193 | 1194 |
|
@@ -1308,7 +1309,7 @@ struct VPIRPhi : public VPIRInstruction, public VPPhiAccessors {
|
1308 | 1309 | /// opcode and operands of the recipe. This recipe covers most of the
|
1309 | 1310 | /// traditional vectorization cases where each recipe transforms into a
|
1310 | 1311 | /// vectorized version of itself.
|
1311 |
| -class VPWidenRecipe : public VPRecipeWithIRFlags, public VPIRMetadata { |
| 1312 | +class LLVM_ABI VPWidenRecipe : public VPRecipeWithIRFlags, public VPIRMetadata { |
1312 | 1313 | unsigned Opcode;
|
1313 | 1314 |
|
1314 | 1315 | public:
|
@@ -1493,7 +1494,7 @@ class VPWidenIntrinsicRecipe : public VPRecipeWithIRFlags, public VPIRMetadata {
|
1493 | 1494 | };
|
1494 | 1495 |
|
1495 | 1496 | /// A recipe for widening Call instructions using library calls.
|
1496 |
| -class VPWidenCallRecipe : public VPRecipeWithIRFlags, public VPIRMetadata { |
| 1497 | +class LLVM_ABI VPWidenCallRecipe : public VPRecipeWithIRFlags, public VPIRMetadata { |
1497 | 1498 | /// Variant stores a pointer to the chosen function. There is a 1:1 mapping
|
1498 | 1499 | /// between a given VF and the chosen vectorized variant, so there will be a
|
1499 | 1500 | /// different VPlan for each VF with a valid variant.
|
@@ -1587,7 +1588,7 @@ class VPHistogramRecipe : public VPRecipeBase {
|
1587 | 1588 | };
|
1588 | 1589 |
|
1589 | 1590 | /// A recipe for widening select instructions.
|
1590 |
| -struct VPWidenSelectRecipe : public VPRecipeWithIRFlags, public VPIRMetadata { |
| 1591 | +struct LLVM_ABI VPWidenSelectRecipe : public VPRecipeWithIRFlags, public VPIRMetadata { |
1591 | 1592 | VPWidenSelectRecipe(SelectInst &I, ArrayRef<VPValue *> Operands)
|
1592 | 1593 | : VPRecipeWithIRFlags(VPDef::VPWidenSelectSC, Operands, I),
|
1593 | 1594 | VPIRMetadata(I) {}
|
@@ -1631,7 +1632,7 @@ struct VPWidenSelectRecipe : public VPRecipeWithIRFlags, public VPIRMetadata {
|
1631 | 1632 | };
|
1632 | 1633 |
|
1633 | 1634 | /// A recipe for handling GEP instructions.
|
1634 |
| -class VPWidenGEPRecipe : public VPRecipeWithIRFlags { |
| 1635 | +class LLVM_ABI VPWidenGEPRecipe : public VPRecipeWithIRFlags { |
1635 | 1636 | bool isPointerLoopInvariant() const {
|
1636 | 1637 | return getOperand(0)->isDefinedOutsideLoopRegions();
|
1637 | 1638 | }
|
@@ -1817,7 +1818,7 @@ class VPVectorPointerRecipe : public VPRecipeWithIRFlags,
|
1817 | 1818 | /// * VPWidenPointerInductionRecipe: Generate vector and scalar values for a
|
1818 | 1819 | /// pointer induction. Produces either a vector PHI per-part or scalar values
|
1819 | 1820 | /// per-lane based on the canonical induction.
|
1820 |
| -class VPHeaderPHIRecipe : public VPSingleDefRecipe, public VPPhiAccessors { |
| 1821 | +class LLVM_ABI VPHeaderPHIRecipe : public VPSingleDefRecipe, public VPPhiAccessors { |
1821 | 1822 | protected:
|
1822 | 1823 | VPHeaderPHIRecipe(unsigned char VPDefID, Instruction *UnderlyingInstr,
|
1823 | 1824 | VPValue *Start, DebugLoc DL = DebugLoc::getUnknown())
|
@@ -2094,7 +2095,7 @@ class VPWidenPointerInductionRecipe : public VPWidenInductionRecipe,
|
2094 | 2095 | /// recipe is placed in an entry block to a (non-replicate) region, it must have
|
2095 | 2096 | /// exactly 2 incoming values, the first from the predecessor of the region and
|
2096 | 2097 | /// the second from the exiting block of the region.
|
2097 |
| -class VPWidenPHIRecipe : public VPSingleDefRecipe, public VPPhiAccessors { |
| 2098 | +class LLVM_ABI VPWidenPHIRecipe : public VPSingleDefRecipe, public VPPhiAccessors { |
2098 | 2099 | /// Name to use for the generated IR instruction for the widened phi.
|
2099 | 2100 | std::string Name;
|
2100 | 2101 |
|
@@ -2242,7 +2243,7 @@ class VPReductionPHIRecipe : public VPHeaderPHIRecipe,
|
2242 | 2243 |
|
2243 | 2244 | /// A recipe for vectorizing a phi-node as a sequence of mask-based select
|
2244 | 2245 | /// instructions.
|
2245 |
| -class VPBlendRecipe : public VPSingleDefRecipe { |
| 2246 | +class LLVM_ABI VPBlendRecipe : public VPSingleDefRecipe { |
2246 | 2247 | public:
|
2247 | 2248 | /// The blend operation is a User of the incoming values and of their
|
2248 | 2249 | /// respective masks, ordered [I0, M0, I1, M1, I2, M2, ...]. Note that M0 can
|
@@ -2309,7 +2310,7 @@ class VPBlendRecipe : public VPSingleDefRecipe {
|
2309 | 2310 | /// or stores into one wide load/store and shuffles. The first operand of a
|
2310 | 2311 | /// VPInterleave recipe is the address, followed by the stored values, followed
|
2311 | 2312 | /// by an optional mask.
|
2312 |
| -class VPInterleaveRecipe : public VPRecipeBase { |
| 2313 | +class LLVM_ABI VPInterleaveRecipe : public VPRecipeBase { |
2313 | 2314 | const InterleaveGroup<Instruction> *IG;
|
2314 | 2315 |
|
2315 | 2316 | /// Indicates if the interleave group is in a conditional block and requires a
|
@@ -2406,7 +2407,7 @@ class VPInterleaveRecipe : public VPRecipeBase {
|
2406 | 2407 | /// A recipe to represent inloop reduction operations, performing a reduction on
|
2407 | 2408 | /// a vector operand into a scalar value, and adding the result to a chain.
|
2408 | 2409 | /// The Operands are {ChainOp, VecOp, [Condition]}.
|
2409 |
| -class VPReductionRecipe : public VPRecipeWithIRFlags { |
| 2410 | +class LLVM_ABI VPReductionRecipe : public VPRecipeWithIRFlags { |
2410 | 2411 | /// The recurrence kind for the reduction in question.
|
2411 | 2412 | RecurKind RdxKind;
|
2412 | 2413 | bool IsOrdered;
|
@@ -2576,7 +2577,7 @@ class VPPartialReductionRecipe : public VPReductionRecipe {
|
2576 | 2577 | /// intrinsics, performing a reduction on a vector operand with the explicit
|
2577 | 2578 | /// vector length (EVL) into a scalar value, and adding the result to a chain.
|
2578 | 2579 | /// The Operands are {ChainOp, VecOp, EVL, [Condition]}.
|
2579 |
| -class VPReductionEVLRecipe : public VPReductionRecipe { |
| 2580 | +class LLVM_ABI VPReductionEVLRecipe : public VPReductionRecipe { |
2580 | 2581 | public:
|
2581 | 2582 | VPReductionEVLRecipe(VPReductionRecipe &R, VPValue &EVL, VPValue *CondOp,
|
2582 | 2583 | DebugLoc DL = {})
|
@@ -2803,7 +2804,7 @@ class VPMulAccumulateReductionRecipe : public VPReductionRecipe {
|
2803 | 2804 | /// copies of the original scalar type, one per lane, instead of producing a
|
2804 | 2805 | /// single copy of widened type for all lanes. If the instruction is known to be
|
2805 | 2806 | /// a single scalar, only one copy, per lane zero, will be generated.
|
2806 |
| -class VPReplicateRecipe : public VPRecipeWithIRFlags, public VPIRMetadata { |
| 2807 | +class LLVM_ABI VPReplicateRecipe : public VPRecipeWithIRFlags, public VPIRMetadata { |
2807 | 2808 | /// Indicator if only a single replica per lane is needed.
|
2808 | 2809 | bool IsSingleScalar;
|
2809 | 2810 |
|
@@ -2881,7 +2882,7 @@ class VPReplicateRecipe : public VPRecipeWithIRFlags, public VPIRMetadata {
|
2881 | 2882 | };
|
2882 | 2883 |
|
2883 | 2884 | /// A recipe for generating conditional branches on the bits of a mask.
|
2884 |
| -class VPBranchOnMaskRecipe : public VPRecipeBase { |
| 2885 | +class LLVM_ABI VPBranchOnMaskRecipe : public VPRecipeBase { |
2885 | 2886 | public:
|
2886 | 2887 | VPBranchOnMaskRecipe(VPValue *BlockInMask, DebugLoc DL)
|
2887 | 2888 | : VPRecipeBase(VPDef::VPBranchOnMaskSC, {BlockInMask}, DL) {}
|
@@ -2922,7 +2923,7 @@ class VPBranchOnMaskRecipe : public VPRecipeBase {
|
2922 | 2923 | /// order to merge values that are set under such a branch and feed their uses.
|
2923 | 2924 | /// The phi nodes can be scalar or vector depending on the users of the value.
|
2924 | 2925 | /// This recipe works in concert with VPBranchOnMaskRecipe.
|
2925 |
| -class VPPredInstPHIRecipe : public VPSingleDefRecipe { |
| 2926 | +class LLVM_ABI VPPredInstPHIRecipe : public VPSingleDefRecipe { |
2926 | 2927 | public:
|
2927 | 2928 | /// Construct a VPPredInstPHIRecipe given \p PredInst whose value needs a phi
|
2928 | 2929 | /// nodes after merging back from a Branch-on-Mask.
|
@@ -2963,7 +2964,7 @@ class VPPredInstPHIRecipe : public VPSingleDefRecipe {
|
2963 | 2964 |
|
2964 | 2965 | /// A common base class for widening memory operations. An optional mask can be
|
2965 | 2966 | /// provided as the last operand.
|
2966 |
| -class VPWidenMemoryRecipe : public VPRecipeBase, public VPIRMetadata { |
| 2967 | +class LLVM_ABI VPWidenMemoryRecipe : public VPRecipeBase, public VPIRMetadata { |
2967 | 2968 | protected:
|
2968 | 2969 | Instruction &Ingredient;
|
2969 | 2970 |
|
@@ -3044,7 +3045,7 @@ class VPWidenMemoryRecipe : public VPRecipeBase, public VPIRMetadata {
|
3044 | 3045 |
|
3045 | 3046 | /// A recipe for widening load operations, using the address to load from and an
|
3046 | 3047 | /// optional mask.
|
3047 |
| -struct VPWidenLoadRecipe final : public VPWidenMemoryRecipe, public VPValue { |
| 3048 | +struct LLVM_ABI VPWidenLoadRecipe final : public VPWidenMemoryRecipe, public VPValue { |
3048 | 3049 | VPWidenLoadRecipe(LoadInst &Load, VPValue *Addr, VPValue *Mask,
|
3049 | 3050 | bool Consecutive, bool Reverse,
|
3050 | 3051 | const VPIRMetadata &Metadata, DebugLoc DL)
|
@@ -3123,7 +3124,7 @@ struct VPWidenLoadEVLRecipe final : public VPWidenMemoryRecipe, public VPValue {
|
3123 | 3124 |
|
3124 | 3125 | /// A recipe for widening store operations, using the stored value, the address
|
3125 | 3126 | /// to store to and an optional mask.
|
3126 |
| -struct VPWidenStoreRecipe final : public VPWidenMemoryRecipe { |
| 3127 | +struct LLVM_ABI VPWidenStoreRecipe final : public VPWidenMemoryRecipe { |
3127 | 3128 | VPWidenStoreRecipe(StoreInst &Store, VPValue *Addr, VPValue *StoredVal,
|
3128 | 3129 | VPValue *Mask, bool Consecutive, bool Reverse,
|
3129 | 3130 | const VPIRMetadata &Metadata, DebugLoc DL)
|
@@ -3483,7 +3484,7 @@ class VPDerivedIVRecipe : public VPSingleDefRecipe {
|
3483 | 3484 |
|
3484 | 3485 | /// A recipe for handling phi nodes of integer and floating-point inductions,
|
3485 | 3486 | /// producing their scalar values.
|
3486 |
| -class VPScalarIVStepsRecipe : public VPRecipeWithIRFlags, |
| 3487 | +class LLVM_ABI VPScalarIVStepsRecipe : public VPRecipeWithIRFlags, |
3487 | 3488 | public VPUnrollPartAccessor<3> {
|
3488 | 3489 | Instruction::BinaryOps InductionOpcode;
|
3489 | 3490 |
|
@@ -3593,7 +3594,7 @@ struct CastInfo<VPPhiAccessors, const VPRecipeBase *>
|
3593 | 3594 | /// VPBasicBlock serves as the leaf of the Hierarchical Control-Flow Graph. It
|
3594 | 3595 | /// holds a sequence of zero or more VPRecipe's each representing a sequence of
|
3595 | 3596 | /// output IR instructions. All PHI-like recipes must come before any non-PHI recipes.
|
3596 |
| -class VPBasicBlock : public VPBlockBase { |
| 3597 | +class LLVM_ABI VPBasicBlock : public VPBlockBase { |
3597 | 3598 | friend class VPlan;
|
3598 | 3599 |
|
3599 | 3600 | /// Use VPlan::createVPBasicBlock to create VPBasicBlocks.
|
@@ -3781,7 +3782,7 @@ class VPIRBasicBlock : public VPBasicBlock {
|
3781 | 3782 | /// this replication indicator helps to keep a single model for multiple
|
3782 | 3783 | /// candidate VF's. The actual replication takes place only once the desired VF
|
3783 | 3784 | /// and UF have been determined.
|
3784 |
| -class VPRegionBlock : public VPBlockBase { |
| 3785 | +class LLVM_ABI VPRegionBlock : public VPBlockBase { |
3785 | 3786 | friend class VPlan;
|
3786 | 3787 |
|
3787 | 3788 | /// Hold the Single Entry of the SESE region modelled by the VPRegionBlock.
|
@@ -3970,7 +3971,7 @@ class VPlan {
|
3970 | 3971 | TripCount = TC;
|
3971 | 3972 | }
|
3972 | 3973 |
|
3973 |
| - ~VPlan(); |
| 3974 | + LLVM_ABI ~VPlan(); |
3974 | 3975 |
|
3975 | 3976 | void setEntry(VPBasicBlock *VPBB) {
|
3976 | 3977 | Entry = VPBB;
|
@@ -4000,8 +4001,8 @@ class VPlan {
|
4000 | 4001 | }
|
4001 | 4002 |
|
4002 | 4003 | /// Returns the VPRegionBlock of the vector loop.
|
4003 |
| - VPRegionBlock *getVectorLoopRegion(); |
4004 |
| - const VPRegionBlock *getVectorLoopRegion() const; |
| 4004 | + LLVM_ABI VPRegionBlock *getVectorLoopRegion(); |
| 4005 | + LLVM_ABI const VPRegionBlock *getVectorLoopRegion() const; |
4005 | 4006 |
|
4006 | 4007 | /// Returns the 'middle' block of the plan, that is the block that selects
|
4007 | 4008 | /// whether to execute the scalar tail loop or the exit block from the loop
|
@@ -4240,7 +4241,7 @@ class VPlan {
|
4240 | 4241 | /// instructions in \p IRBB, except its terminator which is managed by the
|
4241 | 4242 | /// successors of the block in VPlan. The returned block is owned by the VPlan
|
4242 | 4243 | /// and deleted once the VPlan is destroyed.
|
4243 |
| - VPIRBasicBlock *createVPIRBasicBlock(BasicBlock *IRBB); |
| 4244 | + LLVM_ABI VPIRBasicBlock *createVPIRBasicBlock(BasicBlock *IRBB); |
4244 | 4245 |
|
4245 | 4246 | /// Returns true if the VPlan is based on a loop with an early exit. That is
|
4246 | 4247 | /// the case if the VPlan has either more than one exit block or a single exit
|
|
0 commit comments