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[X86][AMX] Support AMX-TRANSPOSE, part 2 (#115660)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
1 parent 5a2888d commit 813f7c3

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+1148
-73
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clang/include/clang/Basic/BuiltinsX86_64.def

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@@ -139,6 +139,12 @@ TARGET_BUILTIN(__builtin_ia32_t2rpntlvwz1rs_internal, "vUsUsUsV256i*V256i*vC*z",
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TARGET_BUILTIN(__builtin_ia32_t2rpntlvwz1t1_internal, "vUsUsUsV256i*V256i*vC*z", "n", "amx-transpose")
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TARGET_BUILTIN(__builtin_ia32_t2rpntlvwz1rst1_internal, "vUsUsUsV256i*V256i*vC*z", "n", "amx-movrs,amx-transpose")
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TARGET_BUILTIN(__builtin_ia32_ttransposed_internal, "V256iUsUsV256i", "n", "amx-transpose")
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TARGET_BUILTIN(__builtin_ia32_ttdpbf16ps_internal, "V256iUsUsUsV256iV256iV256i", "n", "amx-bf16,amx-transpose")
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TARGET_BUILTIN(__builtin_ia32_ttdpfp16ps_internal, "V256iUsUsUsV256iV256iV256i", "n", "amx-fp16,amx-transpose")
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TARGET_BUILTIN(__builtin_ia32_ttcmmimfp16ps_internal, "V256iUsUsUsV256iV256iV256i", "n", "amx-complex,amx-transpose")
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TARGET_BUILTIN(__builtin_ia32_ttcmmrlfp16ps_internal, "V256iUsUsUsV256iV256iV256i", "n", "amx-complex,amx-transpose")
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TARGET_BUILTIN(__builtin_ia32_tconjtcmmimfp16ps_internal, "V256iUsUsUsV256iV256iV256i", "n", "amx-complex,amx-transpose")
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TARGET_BUILTIN(__builtin_ia32_tconjtfp16_internal, "V256iUsUsV256i", "n", "amx-complex,amx-transpose")
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TARGET_BUILTIN(__builtin_ia32_tcvtrowd2ps_internal, "V16fUsUsV256iUi", "n", "amx-avx512,avx10.2-512")
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TARGET_BUILTIN(__builtin_ia32_tcvtrowps2pbf16h_internal, "V32yUsUsV256iUi", "n", "amx-avx512,avx10.2-512")
@@ -185,6 +191,12 @@ TARGET_BUILTIN(__builtin_ia32_t2rpntlvwz0t1, "vIUcvC*z", "n","amx-transpose")
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TARGET_BUILTIN(__builtin_ia32_t2rpntlvwz1, "vIUcvC*z", "n", "amx-transpose")
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TARGET_BUILTIN(__builtin_ia32_t2rpntlvwz1t1, "vIUcvC*z", "n","amx-transpose")
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TARGET_BUILTIN(__builtin_ia32_ttransposed, "vIUcIUc", "n", "amx-transpose")
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TARGET_BUILTIN(__builtin_ia32_ttdpbf16ps, "vIUcIUcIUc", "n", "amx-bf16,amx-transpose")
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TARGET_BUILTIN(__builtin_ia32_ttdpfp16ps, "vIUcIUcIUc", "n", "amx-fp16,amx-transpose")
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TARGET_BUILTIN(__builtin_ia32_ttcmmimfp16ps, "vIUcIUcIUc", "n", "amx-complex,amx-transpose")
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TARGET_BUILTIN(__builtin_ia32_ttcmmrlfp16ps, "vIUcIUcIUc", "n", "amx-complex,amx-transpose")
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TARGET_BUILTIN(__builtin_ia32_tconjtcmmimfp16ps, "vIUcIUcIUc", "n", "amx-complex,amx-transpose")
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TARGET_BUILTIN(__builtin_ia32_tconjtfp16, "vIUcIUc", "n", "amx-complex,amx-transpose")
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TARGET_BUILTIN(__builtin_ia32_tcvtrowd2ps, "V16fIUcUi", "n", "amx-avx512,avx10.2-512")
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TARGET_BUILTIN(__builtin_ia32_tcvtrowps2pbf16h, "V32yIUcUi", "n", "amx-avx512,avx10.2-512")

clang/lib/Headers/CMakeLists.txt

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@@ -147,8 +147,11 @@ set(x86_files
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adxintrin.h
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ammintrin.h
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amxavx512intrin.h
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amxbf16transposeintrin.h
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amxcomplexintrin.h
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amxcomplextransposeintrin.h
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amxfp16intrin.h
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amxfp16transposeintrin.h
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amxfp8intrin.h
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amxintrin.h
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amxmovrsintrin.h
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/*===----- amxbf16transposeintrin.h - AMX-BF16 and AMX-TRANSPOSE ------------===
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*
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* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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* See https://llvm.org/LICENSE.txt for license information.
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* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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*
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*===------------------------------------------------------------------------===
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*/
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#ifndef __IMMINTRIN_H
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#error \
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"Never use <amxbf16transposeintrin.h> directly; use <immintrin.h> instead."
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#endif /* __IMMINTRIN_H */
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#ifndef __AMX_BF16TRANSPOSEINTRIN_H
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#define __AMX_BF16TRANSPOSEINTRIN_H
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#ifdef __x86_64__
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/* Define the default attributes for the functions in this file. */
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#define __DEFAULT_FN_ATTRS \
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__attribute__((__always_inline__, __nodebug__, \
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__target__("amx-bf16,amx-transpose")))
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/// Compute transpose and dot-product of BF16 (16-bit) floating-point pairs in
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/// tiles \a a and \a b, accumulating the intermediate single-precision
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/// (32-bit) floating-point elements with elements in \a dst, and store the
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/// 32-bit result back to tile \a dst.
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///
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/// \headerfile <immintrin.h>
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///
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/// \code
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/// void _tile_tdpbf16ps (__tile dst, __tile a, __tile b)
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/// \endcode
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///
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/// \code{.operation}
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/// FOR m := 0 TO dst.rows - 1
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/// tmp := dst.row[m]
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/// FOR k := 0 TO (a.colsb / 4) - 1
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/// FOR n := 0 TO (dst.colsb / 4) - 1
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/// tmp.bf32[n] += FP32(a.row[m].bf16[2*k+0]) *
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/// FP32(b.row[k].bf16[2*n+0])
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/// tmp.bf32[n] += FP32(a.row[m].bf16[2*k+1]) *
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/// FP32(b.row[k].bf16[2*n+1])
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/// ENDFOR
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/// ENDFOR
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/// write_row_and_zero(dst, m, tmp, dst.colsb)
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/// ENDFOR
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/// zero_upper_rows(dst, dst.rows)
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/// zero_tileconfig_start()
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/// \endcode
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///
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/// This intrinsic corresponds to the \c TTDPBF16PS instruction.
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///
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/// \param dst
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/// The destination tile. Max size is 1024 Bytes.
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/// \param a
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/// The 1st source tile. Max size is 1024 Bytes.
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/// \param b
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/// The 2nd source tile. Max size is 1024 Bytes.
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#define _tile_tdpbf16ps(dst, a, b) __builtin_ia32_ttdpbf16ps((dst), (a), (b))
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/// This is internal intrinsic. C/C++ user should avoid calling it directly.
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static __inline__ _tile1024i __DEFAULT_FN_ATTRS
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_tile_tdpbf16ps_internal(unsigned short m, unsigned short n, unsigned short k,
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_tile1024i dst, _tile1024i src1, _tile1024i src2) {
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return __builtin_ia32_ttdpbf16ps_internal(m, n, k, dst, src1, src2);
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}
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/// Compute transpose and dot-product of BF16 (16-bit) floating-point pairs in
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/// tiles src0 and src1, accumulating the intermediate single-precision
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/// (32-bit) floating-point elements with elements in "dst", and store the
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/// 32-bit result back to tile "dst".
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///
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/// \headerfile <immintrin.h>
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///
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/// This intrinsic corresponds to the <c> TTDPBF16PS </c> instruction.
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///
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/// \param dst
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/// The destination tile. Max size is 1024 Bytes.
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/// \param src0
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/// The 1st source tile. Max size is 1024 Bytes.
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/// \param src1
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/// The 2nd source tile. Max size is 1024 Bytes.
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__DEFAULT_FN_ATTRS
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static __inline__ void __tile_tdpbf16ps(__tile1024i *dst, __tile1024i src0,
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__tile1024i src1) {
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dst->tile = _tile_tdpbf16ps_internal(src0.row, src1.col, src0.col, dst->tile,
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src0.tile, src1.tile);
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}
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#undef __DEFAULT_FN_ATTRS
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#endif /* __x86_64__ */
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#endif /* __AMX_BF16TRANSPOSEINTRIN_H */

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