We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
1 parent 740da00 commit 79d5db4Copy full SHA for 79d5db4
llvm/include/llvm/Target/Target.td
@@ -538,11 +538,11 @@ include "llvm/Target/TargetInstrPredicate.td"
538
include "llvm/Target/TargetSchedule.td"
539
540
class InstructionEncoding {
541
- // Size of encoded instruction.
+ // Size of encoded instruction in bytes.
542
int Size;
543
544
- // The "namespace" in which this instruction exists, on targets like ARM
545
- // which multiple ISA namespaces exist.
+ // The "namespace" in which this instruction exists (on targets like ARM
+ // where multiple ISA namespaces exist).
546
string DecoderNamespace = "";
547
548
// List of predicates which will be turned into isel matching code.
0 commit comments