[RISCV] Fix crash when trying to remove segment (#146524)

LiveInterval DefLI can be consisting of multiple segments, and SlotIndex
NewDefSI can be inside any of them. Currenty it is assumed that NewDefSI
belongs to the first segment, and when trying to call removeSegment,
clang crashes since there is no segment containing [DefLI.beginIndex(),
NewDefSI]

FIxes #146518

Author: sc-clulzze

llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp

@@ -1768,8 +1768,9 @@ void RISCVInsertVSETVLI::insertReadVL(MachineBasicBlock &MBB) {
           SlotIndex NewDefSI =
               LIS->InsertMachineInstrInMaps(*ReadVLMI).getRegSlot();
           LiveInterval &DefLI = LIS->getInterval(VLOutput);
-          VNInfo *DefVNI = DefLI.getVNInfoAt(DefLI.beginIndex());
-          DefLI.removeSegment(DefLI.beginIndex(), NewDefSI);
+          LiveRange::Segment *DefSeg = DefLI.getSegmentContaining(NewDefSI);
+          VNInfo *DefVNI = DefLI.getVNInfoAt(DefSeg->start);
+          DefLI.removeSegment(DefSeg->start, NewDefSI);
           DefVNI->def = NewDefSI;
         }
       }

llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll

@@ -721,3 +721,35 @@ define i64 @avl_undef2() {
   %1 = tail call i64 @llvm.riscv.vsetvli(i64 poison, i64 2, i64 7)
   ret i64 %1
 }
+
+define i64 @vsetvli_vleff(ptr %s, i64 %evl) {
+; CHECK-LABEL: vsetvli_vleff:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    vsetvli a3, zero, e16, m1, ta, ma
+; CHECK-NEXT:    vmv.v.i v8, 0
+; CHECK-NEXT:  .LBB37_1: # %while.body
+; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
+; CHECK-NEXT:    vsetvli zero, a1, e16, m1, tu, ma
+; CHECK-NEXT:    vmv1r.v v9, v8
+; CHECK-NEXT:    vle16ff.v v9, (a0)
+; CHECK-NEXT:    csrr a2, vl
+; CHECK-NEXT:    beqz a2, .LBB37_1
+; CHECK-NEXT:  # %bb.2: # %while.end
+; CHECK-NEXT:    li a0, 0
+; CHECK-NEXT:    ret
+entry:
+  br label %while.cond
+
+while.cond:
+  %new_vl.0 = phi i64 [ 0, %entry ], [ %1, %while.body ]
+  %cmp = icmp eq i64 %new_vl.0, 0
+  br i1 %cmp, label %while.body, label %while.end
+
+while.body:
+  %0 = tail call { <vscale x 4 x i16>, i64 } @llvm.riscv.vleff.nxv4i16.i64(<vscale x 4 x i16> zeroinitializer, ptr %s, i64 %evl)
+  %1 = extractvalue { <vscale x 4 x i16>, i64 } %0, 1
+  br label %while.cond
+
+while.end:
+  ret i64 0
+}

llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir

@@ -100,6 +100,10 @@
     ret void
   }
 
+  define void @vsetvli_vleff() {
+    ret void
+  }
+
   declare <vscale x 1 x i64> @llvm.riscv.vadd.nxv1i64.nxv1i64.i64(<vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, i64) #1
 
   declare <vscale x 1 x i64> @llvm.riscv.vle.nxv1i64.i64(<vscale x 1 x i64>, ptr nocapture, i64) #4
@@ -622,3 +626,41 @@ body: |
     dead $x0 = PseudoVSETIVLI 1, 208, implicit-def $vl, implicit-def $vtype
     %v:vr = COPY $v8, implicit $vtype
     %x = PseudoVSETVLI %x, 208, implicit-def $vl, implicit-def $vtype
+...
+---
+name:            vsetvli_vleff
+tracksRegLiveness: true
+body:             |
+  ; CHECK-LABEL: name: vsetvli_vleff
+  ; CHECK: bb.0:
+  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   %vl:gpr = COPY $x0
+  ; CHECK-NEXT:   BNE $x0, $x0, %bb.2
+  ; CHECK-NEXT:   PseudoBR %bb.1
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.1:
+  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   dead $x0 = PseudoVSETIVLI 0, 200 /* e16, m1, ta, ma */, implicit-def $vl, implicit-def $vtype
+  ; CHECK-NEXT:   $noreg, $x0 = PseudoVLE16FF_V_M1 $noreg, $noreg, 0, 4 /* e16 */, 2 /* tu, ma */, implicit $vl, implicit $vtype, implicit-def $vl
+  ; CHECK-NEXT:   %vl:gpr = PseudoReadVL implicit $vl
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.2:
+  ; CHECK-NEXT:   $x10 = COPY %vl
+  ; CHECK-NEXT:   PseudoRET implicit killed $x10
+  bb.0:
+    successors: %bb.1(0x40000000), %bb.2(0x40000000)
+
+    %vl:gpr = COPY $x0
+    BNE $x0, $x0, %bb.2
+    PseudoBR %bb.1
+
+  bb.1:
+    successors: %bb.2(0x80000000)
+
+    $noreg, %vl:gpr = PseudoVLE16FF_V_M1 $noreg, $noreg, 0, 4 /* e16 */, 2 /* tu, ma */
+
+  bb.2:
+    $x10 = COPY %vl
+    PseudoRET implicit killed $x10