[Precommit] fold icmp of select with constants and invertible op

Author: Acthinks

llvm/test/Transforms/InstCombine/icmp-select-operator-constant.ll

@@ -0,0 +1,342 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt -S -passes=instcombine < %s | FileCheck %s
+
+; shl nsw
+; scmp
+define i1 @shl_nsw_scmp(i8 %a, i1 %cond) {
+; CHECK-LABEL: define i1 @shl_nsw_scmp(
+; CHECK-SAME: i8 [[A:%.*]], i1 [[COND:%.*]]) {
+; CHECK-NEXT:    [[A_SHL:%.*]] = shl nsw i8 [[A]], 3
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND]], i8 8, i8 16
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i8 [[A_SHL]], [[SEL]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %a_shl = shl nsw i8 %a, 3
+  %sel = select i1 %cond, i8 8, i8 16
+  %cmp = icmp sgt i8 %a_shl, %sel
+  ret i1 %cmp
+}
+; scmp commutative
+define i1 @c_shl_nsw_scmp(i8 %a, i1 %cond) {
+; CHECK-LABEL: define i1 @c_shl_nsw_scmp(
+; CHECK-SAME: i8 [[A:%.*]], i1 [[COND:%.*]]) {
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND]], i8 8, i8 16
+; CHECK-NEXT:    [[A_SHL:%.*]] = shl nsw i8 [[A]], 3
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i8 [[SEL]], [[A_SHL]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %sel = select i1 %cond, i8 8, i8 16
+  %a_shl = shl nsw i8 %a, 3
+  %cmp = icmp sgt i8 %sel, %a_shl
+  ret i1 %cmp
+}
+; scmp mismatch
+define i1 @shl_nsw_scmp_mismatch(i8 %a, i1 %cond) {
+; CHECK-LABEL: define i1 @shl_nsw_scmp_mismatch(
+; CHECK-SAME: i8 [[A:%.*]], i1 [[COND:%.*]]) {
+; CHECK-NEXT:    [[A_SHL:%.*]] = shl nsw i8 [[A]], 3
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND]], i8 8, i8 1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i8 [[A_SHL]], [[SEL]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %a_shl = shl nsw i8 %a, 3
+  %sel = select i1 %cond, i8 8, i8 1
+  %cmp = icmp sgt i8 %a_shl, %sel
+  ret i1 %cmp
+}
+; ucmp
+define i1 @shl_nsw_ucmp(i8 %a, i1 %cond) {
+; CHECK-LABEL: define i1 @shl_nsw_ucmp(
+; CHECK-SAME: i8 [[A:%.*]], i1 [[COND:%.*]]) {
+; CHECK-NEXT:    [[A_SHL:%.*]] = shl nsw i8 [[A]], 3
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND]], i8 8, i8 24
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i8 [[A_SHL]], [[SEL]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %a_shl = shl nsw i8 %a, 3
+  %sel = select i1 %cond, i8 8, i8 24
+  %cmp = icmp ugt i8 %a_shl, %sel
+  ret i1 %cmp
+}
+
+; shl nuw only ucmp/eq/ne
+; ucmp
+define i1 @shl_nuw_ucmp(i8 %a, i1 %cond) {
+; CHECK-LABEL: define i1 @shl_nuw_ucmp(
+; CHECK-SAME: i8 [[A:%.*]], i1 [[COND:%.*]]) {
+; CHECK-NEXT:    [[A_SHL:%.*]] = shl nuw i8 [[A]], 3
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND]], i8 8, i8 32
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i8 [[A_SHL]], [[SEL]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %a_shl = shl nuw i8 %a, 3
+  %sel = select i1 %cond, i8 8, i8 32
+  %cmp = icmp ult i8 %a_shl, %sel
+  ret i1 %cmp
+}
+
+; eq
+define i1 @shl_nuw_eqcmp(i8 %a, i1 %cond) {
+; CHECK-LABEL: define i1 @shl_nuw_eqcmp(
+; CHECK-SAME: i8 [[A:%.*]], i1 [[COND:%.*]]) {
+; CHECK-NEXT:    [[A_SHL:%.*]] = shl nuw i8 [[A]], 3
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND]], i8 8, i8 64
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i8 [[SEL]], [[A_SHL]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %a_shl = shl nuw i8 %a, 3
+  %sel = select i1 %cond, i8 8, i8 64
+  %cmp = icmp eq i8 %sel, %a_shl
+  ret i1 %cmp
+}
+
+; scmp mismatch
+define i1 @shl_nuw_scmp(i8 %a, i1 %cond) {
+; CHECK-LABEL: define i1 @shl_nuw_scmp(
+; CHECK-SAME: i8 [[A:%.*]], i1 [[COND:%.*]]) {
+; CHECK-NEXT:    [[A_SHL:%.*]] = shl nuw i8 [[A]], 3
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND]], i8 8, i8 32
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i8 [[A_SHL]], [[SEL]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %a_shl = shl nuw i8 %a, 3
+  %sel = select i1 %cond, i8 8, i8 32
+  %cmp = icmp slt i8 %a_shl, %sel
+  ret i1 %cmp
+}
+
+; ashr exact
+; ucmp
+define i1 @ashr_exact_ucmp(i8 %a, i1 %cond) {
+; CHECK-LABEL: define i1 @ashr_exact_ucmp(
+; CHECK-SAME: i8 [[A:%.*]], i1 [[COND:%.*]]) {
+; CHECK-NEXT:    [[A_SHL:%.*]] = ashr exact i8 [[A]], 2
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND]], i8 12, i8 4
+; CHECK-NEXT:    [[CMP:%.*]] = icmp uge i8 [[A_SHL]], [[SEL]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %a_shl = ashr exact i8 %a, 2
+  %sel = select i1 %cond, i8 12, i8 4
+  %cmp = icmp uge i8 %a_shl, %sel
+  ret i1 %cmp
+}
+; scmp
+define i1 @ashr_exact_scmp(i8 %a, i1 %cond) {
+; CHECK-LABEL: define i1 @ashr_exact_scmp(
+; CHECK-SAME: i8 [[A:%.*]], i1 [[COND:%.*]]) {
+; CHECK-NEXT:    [[A_SHL:%.*]] = ashr exact i8 [[A]], 2
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND]], i8 8, i8 4
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i8 [[A_SHL]], [[SEL]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %a_shl = ashr exact i8 %a, 2
+  %sel = select i1 %cond, i8 8, i8 4
+  %cmp = icmp sgt i8 %a_shl, %sel
+  ret i1 %cmp
+}
+
+; lshr exact only ucmp/eq/ne
+; ucmp
+define i1 @lshr_exact_ucmp(i8 %a, i1 %cond) {
+; CHECK-LABEL: define i1 @lshr_exact_ucmp(
+; CHECK-SAME: i8 [[A:%.*]], i1 [[COND:%.*]]) {
+; CHECK-NEXT:    [[A_SHL:%.*]] = lshr exact i8 [[A]], 1
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND]], i8 1, i8 3
+; CHECK-NEXT:    [[CMP:%.*]] = icmp samesign ugt i8 [[A_SHL]], [[SEL]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %a_shl = lshr exact i8 %a, 1
+  %sel = select i1 %cond, i8 1, i8 3
+  %cmp = icmp ugt i8 %a_shl, %sel
+  ret i1 %cmp
+}
+; scmp mismatch
+define i1 @lshr_exact_scmp(i8 %a, i1 %cond) {
+; CHECK-LABEL: define i1 @lshr_exact_scmp(
+; CHECK-SAME: i8 [[A:%.*]], i1 [[COND:%.*]]) {
+; CHECK-NEXT:    [[A_SHL:%.*]] = lshr exact i8 [[A]], 1
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND]], i8 1, i8 3
+; CHECK-NEXT:    [[CMP:%.*]] = icmp samesign uge i8 [[A_SHL]], [[SEL]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %a_shl = lshr exact i8 %a, 1
+  %sel = select i1 %cond, i8 1, i8 3
+  %cmp = icmp sge i8 %a_shl, %sel
+  ret i1 %cmp
+}
+
+; zext only ucmp/eq/ne
+; ucmp
+define i1 @zext_ucmp(i8 %a, i16 %c0, i16 %c1, i1 %cond) {
+; CHECK-LABEL: define i1 @zext_ucmp(
+; CHECK-SAME: i8 [[A:%.*]], i16 [[C0:%.*]], i16 [[C1:%.*]], i1 [[COND:%.*]]) {
+; CHECK-NEXT:    [[IDX:%.*]] = zext i8 [[A]] to i16
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND]], i16 128, i16 64
+; CHECK-NEXT:    [[CMP:%.*]] = icmp samesign ugt i16 [[SEL]], [[IDX]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %idx = zext i8 %a to i16
+  %sel = select i1 %cond, i16 128, i16 64
+  %cmp = icmp ult i16 %idx, %sel
+  ret i1 %cmp
+}
+; scmp mismatch
+define i1 @zext_scmp_mismatch(i8 %a, i16 %c0, i16 %c1, i1 %cond) {
+; CHECK-LABEL: define i1 @zext_scmp_mismatch(
+; CHECK-SAME: i8 [[A:%.*]], i16 [[C0:%.*]], i16 [[C1:%.*]], i1 [[COND:%.*]]) {
+; CHECK-NEXT:    [[IDX:%.*]] = zext i8 [[A]] to i16
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND]], i16 128, i16 64
+; CHECK-NEXT:    [[CMP:%.*]] = icmp samesign ugt i16 [[SEL]], [[IDX]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %idx = zext i8 %a to i16
+  %sel = select i1 %cond, i16 128, i16 64
+  %cmp = icmp slt i16 %idx, %sel
+  ret i1 %cmp
+}
+
+; sext
+; ucmp
+define i1 @sext_ucmp(i8 %a, i16 %c0, i16 %c1, i1 %cond) {
+; CHECK-LABEL: define i1 @sext_ucmp(
+; CHECK-SAME: i8 [[A:%.*]], i16 [[C0:%.*]], i16 [[C1:%.*]], i1 [[COND:%.*]]) {
+; CHECK-NEXT:    [[IDX:%.*]] = sext i8 [[A]] to i16
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND]], i16 -127, i16 126
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i16 [[SEL]], [[IDX]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %idx = sext i8 %a to i16
+  %sel = select i1 %cond, i16 -127, i16 126
+  %cmp = icmp ult i16 %idx, %sel
+  ret i1 %cmp
+}
+; ucmp mismatch
+define i1 @sext_ucmp_mismatch(i8 %a, i16 %c0, i16 %c1, i1 %cond) {
+; CHECK-LABEL: define i1 @sext_ucmp_mismatch(
+; CHECK-SAME: i8 [[A:%.*]], i16 [[C0:%.*]], i16 [[C1:%.*]], i1 [[COND:%.*]]) {
+; CHECK-NEXT:    [[IDX:%.*]] = sext i8 [[A]] to i16
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND]], i16 -129, i16 128
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i16 [[SEL]], [[IDX]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %idx = sext i8 %a to i16
+  %sel = select i1 %cond, i16 -129, i16 128
+  %cmp = icmp ult i16 %idx, %sel
+  ret i1 %cmp
+}
+; scmp
+define i1 @sext_scmp(i8 %a, i16 %c0, i16 %c1, i1 %cond) {
+; CHECK-LABEL: define i1 @sext_scmp(
+; CHECK-SAME: i8 [[A:%.*]], i16 [[C0:%.*]], i16 [[C1:%.*]], i1 [[COND:%.*]]) {
+; CHECK-NEXT:    [[IDX:%.*]] = sext i8 [[A]] to i16
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND]], i16 -5, i16 9
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i16 [[SEL]], [[IDX]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %idx = sext i8 %a to i16
+  %sel = select i1 %cond, i16 -5, i16 9
+  %cmp = icmp slt i16 %idx, %sel
+  ret i1 %cmp
+}
+
+; or disjoint
+; ucmp
+define i1 @or_disjoint_ucmp(i8 %a, i1 %cond) {
+; CHECK-LABEL: define i1 @or_disjoint_ucmp(
+; CHECK-SAME: i8 [[A:%.*]], i1 [[COND:%.*]]) {
+; CHECK-NEXT:    [[OR:%.*]] = or disjoint i8 [[A]], 3
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND]], i8 11, i8 7
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i8 [[OR]], [[SEL]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %or = or disjoint i8 %a, 3
+  %sel = select i1 %cond, i8 11, i8 7
+  %cmp = icmp ult i8 %or, %sel
+  ret i1 %cmp
+}
+; scmp mismatch
+define i1 @or_disjoint_scmp(i8 %a, i1 %cond) {
+; CHECK-LABEL: define i1 @or_disjoint_scmp(
+; CHECK-SAME: i8 [[A:%.*]], i1 [[COND:%.*]]) {
+; CHECK-NEXT:    [[OR:%.*]] = or disjoint i8 [[A]], 3
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND]], i8 11, i8 7
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i8 [[OR]], [[SEL]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %or = or disjoint i8 %a, 3
+  %sel = select i1 %cond, i8 11, i8 7
+  %cmp = icmp slt i8 %or, %sel
+  ret i1 %cmp
+}
+; mismatch constant '4' not disjoint
+define i1 @or_ucmp_mismatch(i8 %a, i1 %cond) {
+; CHECK-LABEL: define i1 @or_ucmp_mismatch(
+; CHECK-SAME: i8 [[A:%.*]], i1 [[COND:%.*]]) {
+; CHECK-NEXT:    [[OR:%.*]] = or disjoint i8 [[A]], 3
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND]], i8 11, i8 4
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i8 [[OR]], [[SEL]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %or = or disjoint i8 %a, 3
+  %sel = select i1 %cond, i8 11, i8 4
+  %cmp = icmp ult i8 %or, %sel
+  ret i1 %cmp
+}
+
+; sub only eq/ne
+define i1 @sub_eq(i8 %a, i1 %cond) {
+; CHECK-LABEL: define i1 @sub_eq(
+; CHECK-SAME: i8 [[A:%.*]], i1 [[COND:%.*]]) {
+; CHECK-NEXT:    [[TMP1:%.*]] = select i1 [[COND]], i8 4, i8 12
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i8 [[A]], [[TMP1]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %sub = sub i8 %a, 5
+  %sel = select i1 %cond, i8 -1, i8 7
+  %cmp = icmp eq i8 %sub, %sel
+  ret i1 %cmp
+}
+; ucmp mismatch
+define i1 @sub_ucmp(i8 %a, i1 %cond) {
+; CHECK-LABEL: define i1 @sub_ucmp(
+; CHECK-SAME: i8 [[A:%.*]], i1 [[COND:%.*]]) {
+; CHECK-NEXT:    [[TMP1:%.*]] = add i8 [[A]], -13
+; CHECK-NEXT:    [[CMP1:%.*]] = icmp ult i8 [[TMP1]], -8
+; CHECK-NEXT:    [[NOT_COND:%.*]] = xor i1 [[COND]], true
+; CHECK-NEXT:    [[CMP:%.*]] = select i1 [[NOT_COND]], i1 [[CMP1]], i1 false
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %sub = sub i8 %a, 5
+  %sel = select i1 %cond, i8 -1, i8 7
+  %cmp = icmp ugt i8 %sub, %sel
+  ret i1 %cmp
+}
+
+; add only eq/ne
+define i1 @add_ne(i8 %a, i1 %cond) {
+; CHECK-LABEL: define i1 @add_ne(
+; CHECK-SAME: i8 [[A:%.*]], i1 [[COND:%.*]]) {
+; CHECK-NEXT:    [[TMP1:%.*]] = select i1 [[COND]], i8 -6, i8 2
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i8 [[A]], [[TMP1]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %sub = add i8 %a, 5
+  %sel = select i1 %cond, i8 -1, i8 7
+  %cmp = icmp ne i8 %sub, %sel
+  ret i1 %cmp
+}
+
+; xor only eq/ne
+define i1 @xor_eq(i8 %a, i1 %cond) {
+; CHECK-LABEL: define i1 @xor_eq(
+; CHECK-SAME: i8 [[A:%.*]], i1 [[COND:%.*]]) {
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND]], i8 -1, i8 7
+; CHECK-NEXT:    [[TMP1:%.*]] = xor i8 [[A]], [[SEL]]
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i8 [[TMP1]], 5
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %sub = xor i8 %a, 5
+  %sel = select i1 %cond, i8 -1, i8 7
+  %cmp = icmp eq i8 %sub, %sel
+  ret i1 %cmp
+}