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[RISCV] Add coverage for missing insert_subvector combine
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llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll

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@@ -607,6 +607,42 @@ define <vscale x 32 x bfloat> @insert_nxv32bf16_undef_nxv1bf16_26(<vscale x 1 x
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ret <vscale x 32 x bfloat> %v
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}
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define <vscale x 8 x i32> @insert_splat_to_undef() {
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; CHECK-LABEL: insert_splat_to_undef:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma
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; CHECK-NEXT: vmv.v.i v8, 1
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; CHECK-NEXT: ret
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%v = call <vscale x 8 x i32> @llvm.vector.insert.nxv4i32.nxv8i32(<vscale x 8 x i32> poison, <vscale x 4 x i32> splat (i32 1), i64 0)
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ret <vscale x 8 x i32> %v
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}
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define <vscale x 8 x i32> @insert_splat_to_splat() {
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; CHECK-LABEL: insert_splat_to_splat:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma
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; CHECK-NEXT: vmv.v.i v12, 1
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; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma
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; CHECK-NEXT: vmv.v.i v8, 1
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; CHECK-NEXT: vmv2r.v v8, v12
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; CHECK-NEXT: ret
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%v = call <vscale x 8 x i32> @llvm.vector.insert.nxv4i32.nxv8i32(<vscale x 8 x i32> splat (i32 1), <vscale x 4 x i32> splat (i32 1), i64 0)
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ret <vscale x 8 x i32> %v
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}
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define <vscale x 8 x i32> @insert_splat_to_splat2() {
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; CHECK-LABEL: insert_splat_to_splat2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma
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; CHECK-NEXT: vmv.v.i v12, 1
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; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma
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; CHECK-NEXT: vmv.v.i v8, 0
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; CHECK-NEXT: vmv2r.v v8, v12
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; CHECK-NEXT: ret
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%v = call <vscale x 8 x i32> @llvm.vector.insert.nxv4i32.nxv8i32(<vscale x 8 x i32> splat (i32 0), <vscale x 4 x i32> splat (i32 1), i64 0)
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ret <vscale x 8 x i32> %v
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}
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attributes #0 = { vscale_range(2,1024) }
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declare <vscale x 4 x i1> @llvm.vector.insert.nxv1i1.nxv4i1(<vscale x 4 x i1>, <vscale x 1 x i1>, i64)

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