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AMDGPU: Trivial doc fixes (#146021)
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llvm/docs/AMDGPUUsage.rst

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@@ -1451,6 +1451,7 @@ The AMDGPU backend implements the following LLVM IR intrinsics.
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It is preferred over llvm.amdgcn.mov.dpp.`<type>` for future use.
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`llvm.amdgcn.update.dpp.<type> <old> <src> <dpp_ctrl> <row_mask> <bank_mask> <bound_ctrl>`
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Should be equivalent to:
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- `v_mov_b32 <dest> <old>`
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- `v_mov_b32 <dest> <src> <dpp_ctrl> <row_mask> <bank_mask> <bound_ctrl>`
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@@ -6032,7 +6033,7 @@ GFX6-GFX8
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available in dispatch packet. For M0, it is also possible to use maximum
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possible value of LDS for given target (0x7FFF for GFX6 and 0xFFFF for
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GFX7-GFX8).
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GFX9-GFX11
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GFX9 and later
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The M0 register is not used for range checking LDS accesses and so does not
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need to be initialized in the prolog.
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@@ -16639,25 +16640,25 @@ scratch address space.
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On entry to a function:
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1. SGPR0-3 contain a V# with the following properties (see
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#. SGPR0-3 contain a V# with the following properties (see
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:ref:`amdgpu-amdhsa-kernel-prolog-private-segment-buffer`):
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* Base address pointing to the beginning of the wavefront scratch backing
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memory.
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* Swizzled with dword element size and stride of wavefront size elements.
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2. The FLAT_SCRATCH register pair is setup. See
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#. The FLAT_SCRATCH register pair is setup. See
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:ref:`amdgpu-amdhsa-kernel-prolog-flat-scratch`.
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3. GFX6-GFX8: M0 register set to the size of LDS in bytes. See
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#. GFX6-GFX8: M0 register set to the size of LDS in bytes. See
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:ref:`amdgpu-amdhsa-kernel-prolog-m0`.
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4. The EXEC register is set to the lanes active on entry to the function.
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5. MODE register: *TBD*
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6. VGPR0-31 and SGPR4-29 are used to pass function input arguments as described
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#. The EXEC register is set to the lanes active on entry to the function.
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#. MODE register: *TBD*
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#. VGPR0-31 and SGPR4-29 are used to pass function input arguments as described
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below.
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7. SGPR30-31 return address (RA). The code address that the function must
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#. SGPR30-31 return address (RA). The code address that the function must
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return to when it completes. The value is undefined if the function is *no
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return*.
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8. SGPR32 is used for the stack pointer (SP). It is an unswizzled scratch
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#. SGPR32 is used for the stack pointer (SP). It is an unswizzled scratch
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offset relative to the beginning of the wavefront scratch backing memory.
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The unswizzled SP can be used with buffer instructions as an unswizzled SGPR
@@ -16694,19 +16695,19 @@ On entry to a function:
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arguments after the last local allocation and adjust SGPR32 to the address
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after the last local allocation.
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9. All other registers are unspecified.
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10. Any necessary ``s_waitcnt`` has been performed to ensure memory is available
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to the function.
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11. Use pass-by-reference (byref) in stead of pass-by-value (byval) for struct
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arguments in C ABI. Callee is responsible for allocating stack memory and
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copying the value of the struct if modified. Note that the backend still
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supports byval for struct arguments.
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#. All other registers are unspecified.
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#. Any necessary ``s_waitcnt`` has been performed to ensure memory is available
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to the function.
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#. Use pass-by-reference (byref) in stead of pass-by-value (byval) for struct
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arguments in C ABI. Callee is responsible for allocating stack memory and
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copying the value of the struct if modified. Note that the backend still
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supports byval for struct arguments.
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On exit from a function:
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1. VGPR0-31 and SGPR4-29 are used to pass function result arguments as
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#. VGPR0-31 and SGPR4-29 are used to pass function result arguments as
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described below. Any registers used are considered clobbered registers.
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2. The following registers are preserved and have the same value as on entry:
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#. The following registers are preserved and have the same value as on entry:
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* FLAT_SCRATCH
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* EXEC
@@ -16741,10 +16742,10 @@ On exit from a function:
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preserved if it can be determined that the called function does not change
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their value.
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2. The PC is set to the RA provided on entry.
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3. MODE register: *TBD*.
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4. All other registers are clobbered.
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5. Any necessary ``s_waitcnt`` has been performed to ensure memory accessed by
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#. The PC is set to the RA provided on entry.
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#. MODE register: *TBD*.
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#. All other registers are clobbered.
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#. Any necessary ``s_waitcnt`` has been performed to ensure memory accessed by
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function is available to the caller.
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.. TODO::

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