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Benson Chujakevossen5evodius96
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[ARM][Thumb] Save FPSCR + FPEXC for save-vfp attribute
FPSCR and FPEXC will be stored in FPStatusRegs, after GPRCS2 has been saved. - GPRCS1 - GPRCS2 - FPStatusRegs (new) - DPRCS - GPRCS3 - DPRCS2 FPSCR is present on all targets with a VFP, but the FPEXC register is not present on Cortex-M devices, so different amounts of bytes are being pushed onto the stack depending on our target, which would affect alignment for subsequent saves. DPRCS1 will sum up all previous bytes that were saved, and will emit extra instructions to ensure that its alignment is correct. My assumption is that if DPRCS1 is able to correct its alignment to be correct, then all subsequent saves will also have correct alignment. Avoid annotating the saving of FPSCR and FPEXC for functions marked with the interrupt_save_fp attribute, even though this is done as part of frame setup. Since these are status registers, there really is no viable way of annotating this. Since these aren't GPRs or DPRs, they can't be used with .save or .vsave directives. Instead, just record that the intermediate registers r4 and r5 are saved to the stack again. Co-authored-by: Jake Vossen <jake@vossen.dev> Co-authored-by: Alan Phipps <a-phipps@ti.com>
1 parent d7460da commit 5032050

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‎clang/include/clang/Basic/Attr.td

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Original file line numberDiff line numberDiff line change
@@ -999,6 +999,22 @@ def ARMInterrupt : InheritableAttr, TargetSpecificAttr<TargetARM> {
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let Documentation = [ARMInterruptDocs];
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}
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1002+
def ARMInterruptSaveFP : InheritableAttr, TargetSpecificAttr<TargetARM> {
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let Spellings = [GNU<"interrupt_save_fp">];
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let Args = [EnumArgument<"Interrupt", "InterruptType", /*is_string=*/true,
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["IRQ", "FIQ", "SWI", "ABORT", "UNDEF", ""],
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["IRQ", "FIQ", "SWI", "ABORT", "UNDEF", "Generic"],
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1>];
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let HasCustomParsing = 0;
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let Documentation = [ARMInterruptSaveFPDocs];
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}
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def ARMSaveFP : InheritableAttr, TargetSpecificAttr<TargetARM> {
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let Spellings = [];
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let Subjects = SubjectList<[Function]>;
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let Documentation = [InternalOnly];
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}
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def AVRInterrupt : InheritableAttr, TargetSpecificAttr<TargetAVR> {
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let Spellings = [GCC<"interrupt">];
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let Subjects = SubjectList<[Function]>;

‎clang/include/clang/Basic/AttrDocs.td

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@@ -2686,6 +2686,19 @@ The semantics are as follows:
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}];
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}
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def ARMInterruptSaveFPDocs : Documentation {
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let Category = DocCatFunction;
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let Heading = "interrupt_save_fp (ARM)";
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let Content = [{
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Clang supports the GNU style ``__attribute__((interrupt_save_fp("TYPE")))``
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on ARM targets. This attribute behaves the same way as the ARM interrupt
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attribute, except the general purpose floating point registers are also saved,
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along with FPEXC and FPSCR. Note, even on M-class CPUs, where the floating
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point context can be automatically saved depending on the FPCCR, the general
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purpose floating point registers will be saved.
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}];
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}
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def BPFPreserveAccessIndexDocs : Documentation {
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let Category = DocCatFunction;
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let Content = [{

‎clang/include/clang/Basic/DiagnosticSemaKinds.td

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -402,8 +402,14 @@ def warn_anyx86_excessive_regsave : Warning<
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InGroup<DiagGroup<"excessive-regsave">>;
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def warn_arm_interrupt_vfp_clobber : Warning<
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"interrupt service routine with vfp enabled may clobber the "
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"interruptee's vfp state">,
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"interruptee's vfp state; "
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"consider using the `interrupt_save_fp` attribute to prevent this behavior">,
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InGroup<DiagGroup<"arm-interrupt-vfp-clobber">>;
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def warn_arm_interrupt_save_fp_without_vfp_unit : Warning<
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"`interrupt_save_fp` only applies to targets that have a VFP unit enabled "
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"for this compilation; this will be treated as a regular `interrupt` "
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"attribute">,
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InGroup<DiagGroup<"arm-interrupt-save-fp-no-vfp-unit">>;
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def err_arm_interrupt_called : Error<
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"interrupt service routine cannot be called directly">;
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def warn_interrupt_signal_attribute_invalid : Warning<

‎clang/include/clang/Sema/SemaARM.h

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@@ -79,6 +79,7 @@ class SemaARM : public SemaBase {
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void handleNewAttr(Decl *D, const ParsedAttr &AL);
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void handleCmseNSEntryAttr(Decl *D, const ParsedAttr &AL);
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void handleInterruptAttr(Decl *D, const ParsedAttr &AL);
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void handleInterruptSaveFPAttr(Decl *D, const ParsedAttr &AL);
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void CheckSMEFunctionDefAttributes(const FunctionDecl *FD);
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};

‎clang/lib/CodeGen/Targets/ARM.cpp

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@@ -190,6 +190,12 @@ class ARMTargetCodeGenInfo : public TargetCodeGenInfo {
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Fn->addFnAttr("interrupt", Kind);
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// Note: the ARMSaveFPAttr can only exist if we also have an interrupt
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// attribute
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const ARMSaveFPAttr *SaveFPAttr = FD->getAttr<ARMSaveFPAttr>();
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if (SaveFPAttr)
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Fn->addFnAttr("save-fp");
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ARMABIKind ABI = getABIInfo<ARMABIInfo>().getABIKind();
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if (ABI == ARMABIKind::APCS)
195201
return;

‎clang/lib/Sema/SemaARM.cpp

Lines changed: 27 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1316,14 +1316,38 @@ void SemaARM::handleInterruptAttr(Decl *D, const ParsedAttr &AL) {
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return;
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}
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1319-
const TargetInfo &TI = getASTContext().getTargetInfo();
1320-
if (TI.hasFeature("vfp"))
1321-
Diag(D->getLocation(), diag::warn_arm_interrupt_vfp_clobber);
1319+
if (!D->hasAttr<ARMSaveFPAttr>()) {
1320+
const TargetInfo &TI = getASTContext().getTargetInfo();
1321+
if (TI.hasFeature("vfp"))
1322+
Diag(D->getLocation(), diag::warn_arm_interrupt_vfp_clobber);
1323+
}
13221324

13231325
D->addAttr(::new (getASTContext())
13241326
ARMInterruptAttr(getASTContext(), AL, Kind));
13251327
}
13261328

1329+
void SemaARM::handleInterruptSaveFPAttr(Decl *D, const ParsedAttr &AL) {
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// Go ahead and add ARMSaveFPAttr because handleInterruptAttr() checks for
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// it when deciding to issue a diagnostic about clobbering floating point
1332+
// registers, which ARMSaveFPAttr prevents.
1333+
D->addAttr(::new (SemaRef.Context) ARMSaveFPAttr(SemaRef.Context, AL));
1334+
SemaRef.ARM().handleInterruptAttr(D, AL);
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1336+
// If ARM().handleInterruptAttr() failed, remove ARMSaveFPAttr.
1337+
if (!D->hasAttr<ARMInterruptAttr>()) {
1338+
D->dropAttr<ARMSaveFPAttr>();
1339+
return;
1340+
}
1341+
1342+
// If VFP not enabled, remove ARMSaveFPAttr but leave ARMInterruptAttr.
1343+
bool VFP = SemaRef.Context.getTargetInfo().hasFeature("vfp");
1344+
1345+
if (!VFP) {
1346+
SemaRef.Diag(D->getLocation(), diag::warn_arm_interrupt_save_fp_without_vfp_unit);
1347+
D->dropAttr<ARMSaveFPAttr>();
1348+
}
1349+
}
1350+
13271351
// Check if the function definition uses any AArch64 SME features without
13281352
// having the '+sme' feature enabled and warn user if sme locally streaming
13291353
// function returns or uses arguments with VL-based types.

‎clang/lib/Sema/SemaDeclAttr.cpp

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@@ -6950,6 +6950,9 @@ ProcessDeclAttribute(Sema &S, Scope *scope, Decl *D, const ParsedAttr &AL,
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case ParsedAttr::AT_Interrupt:
69516951
handleInterruptAttr(S, D, AL);
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break;
6953+
case ParsedAttr::AT_ARMInterruptSaveFP:
6954+
S.ARM().handleInterruptSaveFPAttr(D, AL);
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break;
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case ParsedAttr::AT_X86ForceAlignArgPointer:
69546957
S.X86().handleForceAlignArgPointerAttr(D, AL);
69556958
break;

‎clang/test/CodeGen/arm-interrupt-save-fp-attr-status-regs.c

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@@ -0,0 +1,34 @@
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// REQUIRES: arm-registered-target
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// RUN: %clang -target arm-none-none-eabihf -mcpu=cortex-r5 -mfpu=vfpv3-d16 -marm -S -o - %s \
3+
// RUN: | FileCheck %s --check-prefix=CHECK-R
4+
// RUN: %clang -target arm-none-none-eabihf -mcpu=cortex-r5 -mfpu=vfpv3-d16 -mthumb -S -o - %s \
5+
// RUN: | FileCheck %s --check-prefix=CHECK-R
6+
// RUN: %clang -target arm-none-none-eabihf -mcpu=cortex-r4 -mfpu=vfpv3-d16 -marm -S -o - %s \
7+
// RUN: | FileCheck %s --check-prefix=CHECK-R
8+
// RUN: %clang -target arm-none-none-eabihf -mcpu=cortex-r4 -mfpu=vfpv3-d16 -mthumb -S -o - %s \
9+
// RUN: | FileCheck %s --check-prefix=CHECK-R
10+
// RUN: %clang -target arm-none-none-eabihf -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -S -o - %s \
11+
// RUN: | FileCheck %s --check-prefix=CHECK-M
12+
// RUN: %clang -target arm-none-none-eabihf -mcpu=cortex-m33 -mfpu=fpv5-sp-d16 -S -o - %s \
13+
// RUN: | FileCheck %s --check-prefix=CHECK-M
14+
15+
void bar();
16+
17+
__attribute__((interrupt_save_fp)) void test_generic_interrupt() {
18+
// CHECK-R: vmrs r4, fpscr
19+
// CHECK-R-NEXT: vmrs r5, fpexc
20+
// CHECK-R-NEXT: .save {r4, r5}
21+
// CHECK-R-NEXT: push {r4, r5}
22+
// .....
23+
// CHECK-R: pop {r4, r5}
24+
// CHECK-R-NEXT: vmsr fpscr, r4
25+
// CHECK-R-NEXT: vmsr fpexc, r5
26+
27+
// CHECK-M: vmrs r4, fpscr
28+
// CHECK-M-NEXT: .save {r4}
29+
// CHECK-M-NEXT: push {r4}
30+
// .....
31+
// CHECK-M: pop {r4}
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// CHECK-M-NEXT: vmsr fpscr, r4
33+
bar();
34+
}

‎clang/test/CodeGen/arm-interrupt-save-fp-attr.c

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@@ -0,0 +1,39 @@
1+
// RUN: %clang_cc1 -triple thumb-apple-darwin -target-abi aapcs -target-feature +vfp4 -target-cpu cortex-m3 -emit-llvm -o - %s | FileCheck %s
2+
// RUN: %clang_cc1 -triple arm-apple-darwin -target-abi apcs-gnu -target-feature +vfp4 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-APCS
3+
4+
__attribute__((interrupt_save_fp)) void test_generic_interrupt() {
5+
// CHECK: define{{.*}} arm_aapcscc void @test_generic_interrupt() [[GENERIC_ATTR:#[0-9]+]]
6+
7+
// CHECK-APCS: define{{.*}} void @test_generic_interrupt() [[GENERIC_ATTR:#[0-9]+]]
8+
}
9+
10+
__attribute__((interrupt_save_fp("IRQ"))) void test_irq_interrupt() {
11+
// CHECK: define{{.*}} arm_aapcscc void @test_irq_interrupt() [[IRQ_ATTR:#[0-9]+]]
12+
}
13+
14+
__attribute__((interrupt_save_fp("FIQ"))) void test_fiq_interrupt() {
15+
// CHECK: define{{.*}} arm_aapcscc void @test_fiq_interrupt() [[FIQ_ATTR:#[0-9]+]]
16+
}
17+
18+
__attribute__((interrupt_save_fp("SWI"))) void test_swi_interrupt() {
19+
// CHECK: define{{.*}} arm_aapcscc void @test_swi_interrupt() [[SWI_ATTR:#[0-9]+]]
20+
}
21+
22+
__attribute__((interrupt_save_fp("ABORT"))) void test_abort_interrupt() {
23+
// CHECK: define{{.*}} arm_aapcscc void @test_abort_interrupt() [[ABORT_ATTR:#[0-9]+]]
24+
}
25+
26+
27+
__attribute__((interrupt_save_fp("UNDEF"))) void test_undef_interrupt() {
28+
// CHECK: define{{.*}} arm_aapcscc void @test_undef_interrupt() [[UNDEF_ATTR:#[0-9]+]]
29+
}
30+
31+
32+
// CHECK: attributes [[GENERIC_ATTR]] = { {{.*}} {{"interrupt"[^=]}}{{.*}} "save-fp"
33+
// CHECK: attributes [[IRQ_ATTR]] = { {{.*}} "interrupt"="IRQ" {{.*}} "save-fp"
34+
// CHECK: attributes [[FIQ_ATTR]] = { {{.*}} "interrupt"="FIQ" {{.*}} "save-fp"
35+
// CHECK: attributes [[SWI_ATTR]] = { {{.*}} "interrupt"="SWI" {{.*}} "save-fp"
36+
// CHECK: attributes [[ABORT_ATTR]] = { {{.*}} "interrupt"="ABORT" {{.*}} "save-fp"
37+
// CHECK: attributes [[UNDEF_ATTR]] = { {{.*}} "interrupt"="UNDEF" {{.*}} "save-fp"
38+
39+
// CHECK-APCS: attributes [[GENERIC_ATTR]] = { {{.*}} "interrupt" {{.*}} "save-fp"

‎clang/test/Sema/arm-interrupt-attr.c

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Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
33

44

55
#ifdef __ARM_FP
6-
__attribute__((interrupt("IRQ"))) void float_irq(void); // expected-warning {{interrupt service routine with vfp enabled may clobber the interruptee's vfp state}}
6+
__attribute__((interrupt("IRQ"))) void float_irq(void); // expected-warning {{interrupt service routine with vfp enabled may clobber the interruptee's vfp state; consider using the `interrupt_save_fp` attribute to prevent this behavior}}
77
#else // !defined(__ARM_FP)
88
__attribute__((interrupt("irq"))) void foo1(void) {} // expected-warning {{'interrupt' attribute argument not supported: irq}}
99
__attribute__((interrupt(IRQ))) void foo(void) {} // expected-error {{'interrupt' attribute requires a string}}

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