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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 |
1 | 2 | ; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 -O3 | FileCheck %s --check-prefix=OPT
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2 | 3 | ; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 -O0 | FileCheck %s --check-prefix=NOOPT
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3 | 4 | ; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 -O3 | %ptxas-verify %}
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4 | 5 | ; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 -O0 | %ptxas-verify %}
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5 | 6 |
|
6 |
| -; OPT-LABEL: @mulwide16 |
7 |
| -; NOOPT-LABEL: @mulwide16 |
8 | 7 | define i32 @mulwide16(i16 %a, i16 %b) {
|
9 |
| -; OPT: mul.wide.s16 |
10 |
| -; NOOPT: mul.lo.s32 |
| 8 | +; OPT-LABEL: mulwide16( |
| 9 | +; OPT: { |
| 10 | +; OPT-NEXT: .reg .b16 %rs<3>; |
| 11 | +; OPT-NEXT: .reg .b32 %r<2>; |
| 12 | +; OPT-EMPTY: |
| 13 | +; OPT-NEXT: // %bb.0: |
| 14 | +; OPT-NEXT: ld.param.b16 %rs1, [mulwide16_param_0]; |
| 15 | +; OPT-NEXT: ld.param.b16 %rs2, [mulwide16_param_1]; |
| 16 | +; OPT-NEXT: mul.wide.s16 %r1, %rs1, %rs2; |
| 17 | +; OPT-NEXT: st.param.b32 [func_retval0], %r1; |
| 18 | +; OPT-NEXT: ret; |
| 19 | +; |
| 20 | +; NOOPT-LABEL: mulwide16( |
| 21 | +; NOOPT: { |
| 22 | +; NOOPT-NEXT: .reg .b16 %rs<3>; |
| 23 | +; NOOPT-NEXT: .reg .b32 %r<4>; |
| 24 | +; NOOPT-EMPTY: |
| 25 | +; NOOPT-NEXT: // %bb.0: |
| 26 | +; NOOPT-NEXT: ld.param.b16 %rs2, [mulwide16_param_1]; |
| 27 | +; NOOPT-NEXT: ld.param.b16 %rs1, [mulwide16_param_0]; |
| 28 | +; NOOPT-NEXT: cvt.s32.s16 %r1, %rs1; |
| 29 | +; NOOPT-NEXT: cvt.s32.s16 %r2, %rs2; |
| 30 | +; NOOPT-NEXT: mul.lo.s32 %r3, %r1, %r2; |
| 31 | +; NOOPT-NEXT: st.param.b32 [func_retval0], %r3; |
| 32 | +; NOOPT-NEXT: ret; |
11 | 33 | %val0 = sext i16 %a to i32
|
12 | 34 | %val1 = sext i16 %b to i32
|
13 | 35 | %val2 = mul i32 %val0, %val1
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14 | 36 | ret i32 %val2
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15 | 37 | }
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16 | 38 |
|
17 |
| -; OPT-LABEL: @mulwideu16 |
18 |
| -; NOOPT-LABEL: @mulwideu16 |
19 | 39 | define i32 @mulwideu16(i16 %a, i16 %b) {
|
20 |
| -; OPT: mul.wide.u16 |
21 |
| -; NOOPT: mul.lo.s32 |
| 40 | +; OPT-LABEL: mulwideu16( |
| 41 | +; OPT: { |
| 42 | +; OPT-NEXT: .reg .b16 %rs<3>; |
| 43 | +; OPT-NEXT: .reg .b32 %r<2>; |
| 44 | +; OPT-EMPTY: |
| 45 | +; OPT-NEXT: // %bb.0: |
| 46 | +; OPT-NEXT: ld.param.b16 %rs1, [mulwideu16_param_0]; |
| 47 | +; OPT-NEXT: ld.param.b16 %rs2, [mulwideu16_param_1]; |
| 48 | +; OPT-NEXT: mul.wide.u16 %r1, %rs1, %rs2; |
| 49 | +; OPT-NEXT: st.param.b32 [func_retval0], %r1; |
| 50 | +; OPT-NEXT: ret; |
| 51 | +; |
| 52 | +; NOOPT-LABEL: mulwideu16( |
| 53 | +; NOOPT: { |
| 54 | +; NOOPT-NEXT: .reg .b16 %rs<3>; |
| 55 | +; NOOPT-NEXT: .reg .b32 %r<4>; |
| 56 | +; NOOPT-EMPTY: |
| 57 | +; NOOPT-NEXT: // %bb.0: |
| 58 | +; NOOPT-NEXT: ld.param.b16 %rs2, [mulwideu16_param_1]; |
| 59 | +; NOOPT-NEXT: ld.param.b16 %rs1, [mulwideu16_param_0]; |
| 60 | +; NOOPT-NEXT: cvt.u32.u16 %r1, %rs1; |
| 61 | +; NOOPT-NEXT: cvt.u32.u16 %r2, %rs2; |
| 62 | +; NOOPT-NEXT: mul.lo.s32 %r3, %r1, %r2; |
| 63 | +; NOOPT-NEXT: st.param.b32 [func_retval0], %r3; |
| 64 | +; NOOPT-NEXT: ret; |
22 | 65 | %val0 = zext i16 %a to i32
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23 | 66 | %val1 = zext i16 %b to i32
|
24 | 67 | %val2 = mul i32 %val0, %val1
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25 | 68 | ret i32 %val2
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26 | 69 | }
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27 | 70 |
|
28 |
| -; OPT-LABEL: @mulwide8 |
29 |
| -; NOOPT-LABEL: @mulwide8 |
30 | 71 | define i32 @mulwide8(i8 %a, i8 %b) {
|
31 |
| -; OPT: mul.wide.s16 |
32 |
| -; NOOPT: mul.lo.s32 |
| 72 | +; OPT-LABEL: mulwide8( |
| 73 | +; OPT: { |
| 74 | +; OPT-NEXT: .reg .b16 %rs<3>; |
| 75 | +; OPT-NEXT: .reg .b32 %r<2>; |
| 76 | +; OPT-EMPTY: |
| 77 | +; OPT-NEXT: // %bb.0: |
| 78 | +; OPT-NEXT: ld.param.s8 %rs1, [mulwide8_param_0]; |
| 79 | +; OPT-NEXT: ld.param.s8 %rs2, [mulwide8_param_1]; |
| 80 | +; OPT-NEXT: mul.wide.s16 %r1, %rs1, %rs2; |
| 81 | +; OPT-NEXT: st.param.b32 [func_retval0], %r1; |
| 82 | +; OPT-NEXT: ret; |
| 83 | +; |
| 84 | +; NOOPT-LABEL: mulwide8( |
| 85 | +; NOOPT: { |
| 86 | +; NOOPT-NEXT: .reg .b16 %rs<3>; |
| 87 | +; NOOPT-NEXT: .reg .b32 %r<6>; |
| 88 | +; NOOPT-EMPTY: |
| 89 | +; NOOPT-NEXT: // %bb.0: |
| 90 | +; NOOPT-NEXT: ld.param.b8 %rs2, [mulwide8_param_1]; |
| 91 | +; NOOPT-NEXT: ld.param.b8 %rs1, [mulwide8_param_0]; |
| 92 | +; NOOPT-NEXT: cvt.u32.u16 %r1, %rs1; |
| 93 | +; NOOPT-NEXT: cvt.s32.s8 %r2, %r1; |
| 94 | +; NOOPT-NEXT: cvt.u32.u16 %r3, %rs2; |
| 95 | +; NOOPT-NEXT: cvt.s32.s8 %r4, %r3; |
| 96 | +; NOOPT-NEXT: mul.lo.s32 %r5, %r2, %r4; |
| 97 | +; NOOPT-NEXT: st.param.b32 [func_retval0], %r5; |
| 98 | +; NOOPT-NEXT: ret; |
33 | 99 | %val0 = sext i8 %a to i32
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34 | 100 | %val1 = sext i8 %b to i32
|
35 | 101 | %val2 = mul i32 %val0, %val1
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36 | 102 | ret i32 %val2
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37 | 103 | }
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38 | 104 |
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39 |
| -; OPT-LABEL: @mulwideu8 |
40 |
| -; NOOPT-LABEL: @mulwideu8 |
41 | 105 | define i32 @mulwideu8(i8 %a, i8 %b) {
|
42 |
| -; OPT: mul.wide.u16 |
43 |
| -; NOOPT: mul.lo.s32 |
| 106 | +; OPT-LABEL: mulwideu8( |
| 107 | +; OPT: { |
| 108 | +; OPT-NEXT: .reg .b16 %rs<3>; |
| 109 | +; OPT-NEXT: .reg .b32 %r<2>; |
| 110 | +; OPT-EMPTY: |
| 111 | +; OPT-NEXT: // %bb.0: |
| 112 | +; OPT-NEXT: ld.param.b8 %rs1, [mulwideu8_param_0]; |
| 113 | +; OPT-NEXT: ld.param.b8 %rs2, [mulwideu8_param_1]; |
| 114 | +; OPT-NEXT: mul.wide.u16 %r1, %rs1, %rs2; |
| 115 | +; OPT-NEXT: st.param.b32 [func_retval0], %r1; |
| 116 | +; OPT-NEXT: ret; |
| 117 | +; |
| 118 | +; NOOPT-LABEL: mulwideu8( |
| 119 | +; NOOPT: { |
| 120 | +; NOOPT-NEXT: .reg .b16 %rs<3>; |
| 121 | +; NOOPT-NEXT: .reg .b32 %r<6>; |
| 122 | +; NOOPT-EMPTY: |
| 123 | +; NOOPT-NEXT: // %bb.0: |
| 124 | +; NOOPT-NEXT: ld.param.b8 %rs2, [mulwideu8_param_1]; |
| 125 | +; NOOPT-NEXT: ld.param.b8 %rs1, [mulwideu8_param_0]; |
| 126 | +; NOOPT-NEXT: cvt.u32.u16 %r1, %rs1; |
| 127 | +; NOOPT-NEXT: and.b32 %r2, %r1, 255; |
| 128 | +; NOOPT-NEXT: cvt.u32.u16 %r3, %rs2; |
| 129 | +; NOOPT-NEXT: and.b32 %r4, %r3, 255; |
| 130 | +; NOOPT-NEXT: mul.lo.s32 %r5, %r2, %r4; |
| 131 | +; NOOPT-NEXT: st.param.b32 [func_retval0], %r5; |
| 132 | +; NOOPT-NEXT: ret; |
44 | 133 | %val0 = zext i8 %a to i32
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45 | 134 | %val1 = zext i8 %b to i32
|
46 | 135 | %val2 = mul i32 %val0, %val1
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47 | 136 | ret i32 %val2
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48 | 137 | }
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49 | 138 |
|
50 |
| -; OPT-LABEL: @mulwide32 |
51 |
| -; NOOPT-LABEL: @mulwide32 |
52 | 139 | define i64 @mulwide32(i32 %a, i32 %b) {
|
53 |
| -; OPT: mul.wide.s32 |
54 |
| -; NOOPT: mul.lo.s64 |
| 140 | +; OPT-LABEL: mulwide32( |
| 141 | +; OPT: { |
| 142 | +; OPT-NEXT: .reg .b32 %r<3>; |
| 143 | +; OPT-NEXT: .reg .b64 %rd<2>; |
| 144 | +; OPT-EMPTY: |
| 145 | +; OPT-NEXT: // %bb.0: |
| 146 | +; OPT-NEXT: ld.param.b32 %r1, [mulwide32_param_0]; |
| 147 | +; OPT-NEXT: ld.param.b32 %r2, [mulwide32_param_1]; |
| 148 | +; OPT-NEXT: mul.wide.s32 %rd1, %r1, %r2; |
| 149 | +; OPT-NEXT: st.param.b64 [func_retval0], %rd1; |
| 150 | +; OPT-NEXT: ret; |
| 151 | +; |
| 152 | +; NOOPT-LABEL: mulwide32( |
| 153 | +; NOOPT: { |
| 154 | +; NOOPT-NEXT: .reg .b32 %r<3>; |
| 155 | +; NOOPT-NEXT: .reg .b64 %rd<4>; |
| 156 | +; NOOPT-EMPTY: |
| 157 | +; NOOPT-NEXT: // %bb.0: |
| 158 | +; NOOPT-NEXT: ld.param.b32 %r2, [mulwide32_param_1]; |
| 159 | +; NOOPT-NEXT: ld.param.b32 %r1, [mulwide32_param_0]; |
| 160 | +; NOOPT-NEXT: cvt.s64.s32 %rd1, %r1; |
| 161 | +; NOOPT-NEXT: cvt.s64.s32 %rd2, %r2; |
| 162 | +; NOOPT-NEXT: mul.lo.s64 %rd3, %rd1, %rd2; |
| 163 | +; NOOPT-NEXT: st.param.b64 [func_retval0], %rd3; |
| 164 | +; NOOPT-NEXT: ret; |
55 | 165 | %val0 = sext i32 %a to i64
|
56 | 166 | %val1 = sext i32 %b to i64
|
57 | 167 | %val2 = mul i64 %val0, %val1
|
58 | 168 | ret i64 %val2
|
59 | 169 | }
|
60 | 170 |
|
61 |
| -; OPT-LABEL: @mulwideu32 |
62 |
| -; NOOPT-LABEL: @mulwideu32 |
63 | 171 | define i64 @mulwideu32(i32 %a, i32 %b) {
|
64 |
| -; OPT: mul.wide.u32 |
65 |
| -; NOOPT: mul.lo.s64 |
| 172 | +; OPT-LABEL: mulwideu32( |
| 173 | +; OPT: { |
| 174 | +; OPT-NEXT: .reg .b32 %r<3>; |
| 175 | +; OPT-NEXT: .reg .b64 %rd<2>; |
| 176 | +; OPT-EMPTY: |
| 177 | +; OPT-NEXT: // %bb.0: |
| 178 | +; OPT-NEXT: ld.param.b32 %r1, [mulwideu32_param_0]; |
| 179 | +; OPT-NEXT: ld.param.b32 %r2, [mulwideu32_param_1]; |
| 180 | +; OPT-NEXT: mul.wide.u32 %rd1, %r1, %r2; |
| 181 | +; OPT-NEXT: st.param.b64 [func_retval0], %rd1; |
| 182 | +; OPT-NEXT: ret; |
| 183 | +; |
| 184 | +; NOOPT-LABEL: mulwideu32( |
| 185 | +; NOOPT: { |
| 186 | +; NOOPT-NEXT: .reg .b32 %r<3>; |
| 187 | +; NOOPT-NEXT: .reg .b64 %rd<4>; |
| 188 | +; NOOPT-EMPTY: |
| 189 | +; NOOPT-NEXT: // %bb.0: |
| 190 | +; NOOPT-NEXT: ld.param.b32 %r2, [mulwideu32_param_1]; |
| 191 | +; NOOPT-NEXT: ld.param.b32 %r1, [mulwideu32_param_0]; |
| 192 | +; NOOPT-NEXT: cvt.u64.u32 %rd1, %r1; |
| 193 | +; NOOPT-NEXT: cvt.u64.u32 %rd2, %r2; |
| 194 | +; NOOPT-NEXT: mul.lo.s64 %rd3, %rd1, %rd2; |
| 195 | +; NOOPT-NEXT: st.param.b64 [func_retval0], %rd3; |
| 196 | +; NOOPT-NEXT: ret; |
66 | 197 | %val0 = zext i32 %a to i64
|
67 | 198 | %val1 = zext i32 %b to i64
|
68 | 199 | %val2 = mul i64 %val0, %val1
|
69 | 200 | ret i64 %val2
|
70 | 201 | }
|
71 | 202 |
|
72 |
| -; OPT-LABEL: @mulwideu7 |
73 |
| -; NOOPT-LABEL: @mulwideu7 |
74 | 203 | define i64 @mulwideu7(i7 %a, i7 %b) {
|
75 |
| -; OPT: mul.wide.u32 |
76 |
| -; NOOPT: mul.lo.s64 |
| 204 | +; OPT-LABEL: mulwideu7( |
| 205 | +; OPT: { |
| 206 | +; OPT-NEXT: .reg .b32 %r<3>; |
| 207 | +; OPT-NEXT: .reg .b64 %rd<2>; |
| 208 | +; OPT-EMPTY: |
| 209 | +; OPT-NEXT: // %bb.0: |
| 210 | +; OPT-NEXT: ld.param.b8 %r1, [mulwideu7_param_0]; |
| 211 | +; OPT-NEXT: ld.param.b8 %r2, [mulwideu7_param_1]; |
| 212 | +; OPT-NEXT: mul.wide.u32 %rd1, %r1, %r2; |
| 213 | +; OPT-NEXT: st.param.b64 [func_retval0], %rd1; |
| 214 | +; OPT-NEXT: ret; |
| 215 | +; |
| 216 | +; NOOPT-LABEL: mulwideu7( |
| 217 | +; NOOPT: { |
| 218 | +; NOOPT-NEXT: .reg .b16 %rs<3>; |
| 219 | +; NOOPT-NEXT: .reg .b64 %rd<6>; |
| 220 | +; NOOPT-EMPTY: |
| 221 | +; NOOPT-NEXT: // %bb.0: |
| 222 | +; NOOPT-NEXT: ld.param.b8 %rs2, [mulwideu7_param_1]; |
| 223 | +; NOOPT-NEXT: ld.param.b8 %rs1, [mulwideu7_param_0]; |
| 224 | +; NOOPT-NEXT: cvt.u64.u16 %rd1, %rs1; |
| 225 | +; NOOPT-NEXT: and.b64 %rd2, %rd1, 127; |
| 226 | +; NOOPT-NEXT: cvt.u64.u16 %rd3, %rs2; |
| 227 | +; NOOPT-NEXT: and.b64 %rd4, %rd3, 127; |
| 228 | +; NOOPT-NEXT: mul.lo.s64 %rd5, %rd2, %rd4; |
| 229 | +; NOOPT-NEXT: st.param.b64 [func_retval0], %rd5; |
| 230 | +; NOOPT-NEXT: ret; |
77 | 231 | %val0 = zext i7 %a to i64
|
78 | 232 | %val1 = zext i7 %b to i64
|
79 | 233 | %val2 = mul i64 %val0, %val1
|
80 | 234 | ret i64 %val2
|
81 | 235 | }
|
82 | 236 |
|
83 |
| -; OPT-LABEL: @mulwides7 |
84 |
| -; NOOPT-LABEL: @mulwides7 |
85 | 237 | define i64 @mulwides7(i7 %a, i7 %b) {
|
86 |
| -; OPT: mul.wide.s32 |
87 |
| -; NOOPT: mul.lo.s64 |
| 238 | +; OPT-LABEL: mulwides7( |
| 239 | +; OPT: { |
| 240 | +; OPT-NEXT: .reg .b32 %r<5>; |
| 241 | +; OPT-NEXT: .reg .b64 %rd<2>; |
| 242 | +; OPT-EMPTY: |
| 243 | +; OPT-NEXT: // %bb.0: |
| 244 | +; OPT-NEXT: ld.param.b8 %r1, [mulwides7_param_0]; |
| 245 | +; OPT-NEXT: bfe.s32 %r2, %r1, 0, 7; |
| 246 | +; OPT-NEXT: ld.param.b8 %r3, [mulwides7_param_1]; |
| 247 | +; OPT-NEXT: bfe.s32 %r4, %r3, 0, 7; |
| 248 | +; OPT-NEXT: mul.wide.s32 %rd1, %r2, %r4; |
| 249 | +; OPT-NEXT: st.param.b64 [func_retval0], %rd1; |
| 250 | +; OPT-NEXT: ret; |
| 251 | +; |
| 252 | +; NOOPT-LABEL: mulwides7( |
| 253 | +; NOOPT: { |
| 254 | +; NOOPT-NEXT: .reg .b16 %rs<3>; |
| 255 | +; NOOPT-NEXT: .reg .b64 %rd<6>; |
| 256 | +; NOOPT-EMPTY: |
| 257 | +; NOOPT-NEXT: // %bb.0: |
| 258 | +; NOOPT-NEXT: ld.param.b8 %rs2, [mulwides7_param_1]; |
| 259 | +; NOOPT-NEXT: ld.param.b8 %rs1, [mulwides7_param_0]; |
| 260 | +; NOOPT-NEXT: cvt.u64.u16 %rd1, %rs1; |
| 261 | +; NOOPT-NEXT: bfe.s64 %rd2, %rd1, 0, 7; |
| 262 | +; NOOPT-NEXT: cvt.u64.u16 %rd3, %rs2; |
| 263 | +; NOOPT-NEXT: bfe.s64 %rd4, %rd3, 0, 7; |
| 264 | +; NOOPT-NEXT: mul.lo.s64 %rd5, %rd2, %rd4; |
| 265 | +; NOOPT-NEXT: st.param.b64 [func_retval0], %rd5; |
| 266 | +; NOOPT-NEXT: ret; |
88 | 267 | %val0 = sext i7 %a to i64
|
89 | 268 | %val1 = sext i7 %b to i64
|
90 | 269 | %val2 = mul i64 %val0, %val1
|
91 | 270 | ret i64 %val2
|
92 | 271 | }
|
93 | 272 |
|
94 |
| -; OPT-LABEL: @shl30 |
95 |
| -; NOOPT-LABEL: @shl30 |
96 | 273 | define i64 @shl30(i32 %a) {
|
97 |
| -; OPT: mul.wide |
98 |
| -; NOOPT: shl.b64 |
| 274 | +; OPT-LABEL: shl30( |
| 275 | +; OPT: { |
| 276 | +; OPT-NEXT: .reg .b32 %r<2>; |
| 277 | +; OPT-NEXT: .reg .b64 %rd<2>; |
| 278 | +; OPT-EMPTY: |
| 279 | +; OPT-NEXT: // %bb.0: |
| 280 | +; OPT-NEXT: ld.param.b32 %r1, [shl30_param_0]; |
| 281 | +; OPT-NEXT: mul.wide.s32 %rd1, %r1, 1073741824; |
| 282 | +; OPT-NEXT: st.param.b64 [func_retval0], %rd1; |
| 283 | +; OPT-NEXT: ret; |
| 284 | +; |
| 285 | +; NOOPT-LABEL: shl30( |
| 286 | +; NOOPT: { |
| 287 | +; NOOPT-NEXT: .reg .b32 %r<2>; |
| 288 | +; NOOPT-NEXT: .reg .b64 %rd<3>; |
| 289 | +; NOOPT-EMPTY: |
| 290 | +; NOOPT-NEXT: // %bb.0: |
| 291 | +; NOOPT-NEXT: ld.param.b32 %r1, [shl30_param_0]; |
| 292 | +; NOOPT-NEXT: cvt.s64.s32 %rd1, %r1; |
| 293 | +; NOOPT-NEXT: shl.b64 %rd2, %rd1, 30; |
| 294 | +; NOOPT-NEXT: st.param.b64 [func_retval0], %rd2; |
| 295 | +; NOOPT-NEXT: ret; |
99 | 296 | %conv = sext i32 %a to i64
|
100 | 297 | %shl = shl i64 %conv, 30
|
101 | 298 | ret i64 %shl
|
102 | 299 | }
|
103 | 300 |
|
104 |
| -; OPT-LABEL: @shl31 |
105 |
| -; NOOPT-LABEL: @shl31 |
106 | 301 | define i64 @shl31(i32 %a) {
|
107 |
| -; OPT-NOT: mul.wide |
108 |
| -; NOOPT-NOT: mul.wide |
| 302 | +; OPT-LABEL: shl31( |
| 303 | +; OPT: { |
| 304 | +; OPT-NEXT: .reg .b64 %rd<3>; |
| 305 | +; OPT-EMPTY: |
| 306 | +; OPT-NEXT: // %bb.0: |
| 307 | +; OPT-NEXT: ld.param.s32 %rd1, [shl31_param_0]; |
| 308 | +; OPT-NEXT: shl.b64 %rd2, %rd1, 31; |
| 309 | +; OPT-NEXT: st.param.b64 [func_retval0], %rd2; |
| 310 | +; OPT-NEXT: ret; |
| 311 | +; |
| 312 | +; NOOPT-LABEL: shl31( |
| 313 | +; NOOPT: { |
| 314 | +; NOOPT-NEXT: .reg .b32 %r<2>; |
| 315 | +; NOOPT-NEXT: .reg .b64 %rd<3>; |
| 316 | +; NOOPT-EMPTY: |
| 317 | +; NOOPT-NEXT: // %bb.0: |
| 318 | +; NOOPT-NEXT: ld.param.b32 %r1, [shl31_param_0]; |
| 319 | +; NOOPT-NEXT: cvt.s64.s32 %rd1, %r1; |
| 320 | +; NOOPT-NEXT: shl.b64 %rd2, %rd1, 31; |
| 321 | +; NOOPT-NEXT: st.param.b64 [func_retval0], %rd2; |
| 322 | +; NOOPT-NEXT: ret; |
109 | 323 | %conv = sext i32 %a to i64
|
110 | 324 | %shl = shl i64 %conv, 31
|
111 | 325 | ret i64 %shl
|
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