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AArch64: Replace MCExpr::print with MCAsmInfo::printExpr
Follow-up to 18b67a7
1 parent f11dd11 commit 489dcc9

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1 file changed

+8
-8
lines changed

1 file changed

+8
-8
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llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -278,7 +278,7 @@ void AArch64InstPrinter::printInst(const MCInst *MI, uint64_t Address,
278278
{
279279
WithMarkup M = markup(O, Markup::Immediate);
280280
O << "#";
281-
MI->getOperand(1).getExpr()->print(O, &MAI);
281+
MAI.printExpr(O, *MI->getOperand(1).getExpr());
282282
}
283283
return;
284284
}
@@ -291,7 +291,7 @@ void AArch64InstPrinter::printInst(const MCInst *MI, uint64_t Address,
291291
{
292292
WithMarkup M = markup(O, Markup::Immediate);
293293
O << "#";
294-
MI->getOperand(2).getExpr()->print(O, &MAI);
294+
MAI.printExpr(O, *MI->getOperand(2).getExpr());
295295
}
296296
return;
297297
}
@@ -1163,7 +1163,7 @@ void AArch64InstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
11631163
printImm(MI, OpNo, STI, O);
11641164
} else {
11651165
assert(Op.isExpr() && "unknown operand kind in printOperand");
1166-
Op.getExpr()->print(O, &MAI);
1166+
MAI.printExpr(O, *Op.getExpr());
11671167
}
11681168
}
11691169

@@ -1240,7 +1240,7 @@ void AArch64InstPrinter::printAddSubImm(const MCInst *MI, unsigned OpNum,
12401240
}
12411241
} else {
12421242
assert(MO.isExpr() && "Unexpected operand type!");
1243-
MO.getExpr()->print(O, &MAI);
1243+
MAI.printExpr(O, *MO.getExpr());
12441244
printShifter(MI, OpNum + 1, STI, O);
12451245
}
12461246
}
@@ -1431,7 +1431,7 @@ void AArch64InstPrinter::printUImm12Offset(const MCInst *MI, unsigned OpNum,
14311431
markup(O, Markup::Immediate) << '#' << formatImm(MO.getImm() * Scale);
14321432
} else {
14331433
assert(MO.isExpr() && "Unexpected operand type!");
1434-
MO.getExpr()->print(O, &MAI);
1434+
MAI.printExpr(O, *MO.getExpr());
14351435
}
14361436
}
14371437

@@ -1446,7 +1446,7 @@ void AArch64InstPrinter::printAMIndexedWB(const MCInst *MI, unsigned OpNum,
14461446
} else {
14471447
assert(MO1.isExpr() && "Unexpected operand type!");
14481448
O << ", ";
1449-
MO1.getExpr()->print(O, &MAI);
1449+
MAI.printExpr(O, *MO1.getExpr());
14501450
}
14511451
O << ']';
14521452
}
@@ -1805,7 +1805,7 @@ void AArch64InstPrinter::printAlignedLabel(const MCInst *MI, uint64_t Address,
18051805
markup(O, Markup::Target) << formatHex((uint64_t)TargetAddress);
18061806
} else {
18071807
// Otherwise, just print the expression.
1808-
MI->getOperand(OpNum).getExpr()->print(O, &MAI);
1808+
MAI.printExpr(O, *MI->getOperand(OpNum).getExpr());
18091809
}
18101810
}
18111811

@@ -1832,7 +1832,7 @@ void AArch64InstPrinter::printAdrAdrpLabel(const MCInst *MI, uint64_t Address,
18321832
}
18331833

18341834
// Otherwise, just print the expression.
1835-
MI->getOperand(OpNum).getExpr()->print(O, &MAI);
1835+
MAI.printExpr(O, *MI->getOperand(OpNum).getExpr());
18361836
}
18371837

18381838
void AArch64InstPrinter::printBarrierOption(const MCInst *MI, unsigned OpNo,

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