[WASM] Update test cases for vselct A, <0>, B

Author: badumbatish

llvm/test/CodeGen/AArch64/select_cc.ll

@@ -115,7 +115,7 @@ define <4 x i32> @select_icmp_sgt(<4 x i32> %a, <4 x i8> %b) {
 ; CHECK-SD-NEXT:    sshr v1.4h, v1.4h, #8
 ; CHECK-SD-NEXT:    cmgt v1.4h, v1.4h, #0
 ; CHECK-SD-NEXT:    sshll v1.4s, v1.4h, #0
-; CHECK-SD-NEXT:    bic v0.16b, v0.16b, v1.16b
+; CHECK-SD-NEXT:    bic v0.16b, v1.16b, v0.16b
 ; CHECK-SD-NEXT:    ret
 ;
 ; CHECK-GI-LABEL: select_icmp_sgt:

llvm/test/CodeGen/AArch64/sve-fixed-length-shuffles.ll

@@ -30,7 +30,9 @@ define void @crash_when_lowering_extract_shuffle(ptr %dst, i1 %cond) vscale_rang
 ; CHECK-NEXT:  // %bb.1: // %vector.body
 ; CHECK-NEXT:    movi v0.2d, #0000000000000000
 ; CHECK-NEXT:    movi v1.2d, #0000000000000000
-; CHECK-NEXT:    ptrue p0.s
+; CHECK-NEXT:    ldr z4, [x0]
+; CHECK-NEXT:    ldr z5, [x0, #2, mul vl]
+; CHECK-NEXT:    ldr z6, [x0, #3, mul vl]
 ; CHECK-NEXT:    umov w8, v0.b[8]
 ; CHECK-NEXT:    mov v1.b[1], v0.b[1]
 ; CHECK-NEXT:    fmov s2, w8
@@ -60,31 +62,20 @@ define void @crash_when_lowering_extract_shuffle(ptr %dst, i1 %cond) vscale_rang
 ; CHECK-NEXT:    asr z1.s, z1.s, #31
 ; CHECK-NEXT:    uunpklo z3.s, z3.h
 ; CHECK-NEXT:    lsl z0.s, z0.s, #31
-; CHECK-NEXT:    and z1.s, z1.s, #0x1
+; CHECK-NEXT:    bic z1.d, z1.d, z4.d
 ; CHECK-NEXT:    lsl z2.s, z2.s, #31
+; CHECK-NEXT:    ldr z4, [x0, #1, mul vl]
 ; CHECK-NEXT:    asr z0.s, z0.s, #31
-; CHECK-NEXT:    cmpne p1.s, p0/z, z1.s, #0
-; CHECK-NEXT:    ldr z1, [x0]
+; CHECK-NEXT:    str z1, [x0]
 ; CHECK-NEXT:    lsl z3.s, z3.s, #31
 ; CHECK-NEXT:    asr z2.s, z2.s, #31
-; CHECK-NEXT:    and z0.s, z0.s, #0x1
+; CHECK-NEXT:    bic z0.d, z0.d, z5.d
 ; CHECK-NEXT:    asr z3.s, z3.s, #31
-; CHECK-NEXT:    and z2.s, z2.s, #0x1
-; CHECK-NEXT:    mov z1.s, p1/m, #0 // =0x0
-; CHECK-NEXT:    cmpne p2.s, p0/z, z0.s, #0
-; CHECK-NEXT:    ldr z0, [x0, #2, mul vl]
-; CHECK-NEXT:    and z3.s, z3.s, #0x1
-; CHECK-NEXT:    str z1, [x0]
-; CHECK-NEXT:    cmpne p3.s, p0/z, z3.s, #0
-; CHECK-NEXT:    cmpne p0.s, p0/z, z2.s, #0
-; CHECK-NEXT:    ldr z3, [x0, #3, mul vl]
-; CHECK-NEXT:    ldr z2, [x0, #1, mul vl]
-; CHECK-NEXT:    mov z0.s, p2/m, #0 // =0x0
-; CHECK-NEXT:    mov z3.s, p3/m, #0 // =0x0
-; CHECK-NEXT:    mov z2.s, p0/m, #0 // =0x0
+; CHECK-NEXT:    bic z1.d, z2.d, z4.d
 ; CHECK-NEXT:    str z0, [x0, #2, mul vl]
+; CHECK-NEXT:    bic z3.d, z3.d, z6.d
+; CHECK-NEXT:    str z1, [x0, #1, mul vl]
 ; CHECK-NEXT:    str z3, [x0, #3, mul vl]
-; CHECK-NEXT:    str z2, [x0, #1, mul vl]
 ; CHECK-NEXT:  .LBB1_2: // %exit
 ; CHECK-NEXT:    ret
   %broadcast.splat = shufflevector <32 x i1> zeroinitializer, <32 x i1> zeroinitializer, <32 x i32> zeroinitializer

llvm/test/CodeGen/AArch64/vselect-constants.ll

@@ -124,9 +124,7 @@ define <4 x i32> @cmp_sel_minus1_or_0_vec(<4 x i32> %x, <4 x i32> %y) {
 define <4 x i32> @sel_0_or_minus1_vec(<4 x i1> %cond) {
 ; CHECK-LABEL: sel_0_or_minus1_vec:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    ushll v0.4s, v0.4h, #0
-; CHECK-NEXT:    shl v0.4s, v0.4s, #31
-; CHECK-NEXT:    cmge v0.4s, v0.4s, #0
+; CHECK-NEXT:    movi v0.2d, #0000000000000000
 ; CHECK-NEXT:    ret
   %add = select <4 x i1> %cond, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>
   ret <4 x i32> %add
@@ -170,10 +168,9 @@ define <4 x i32> @sel_0_or_1_vec(<4 x i1> %cond) {
 ; CHECK-LABEL: sel_0_or_1_vec:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ushll v0.4s, v0.4h, #0
-; CHECK-NEXT:    movi v1.4s, #1
 ; CHECK-NEXT:    shl v0.4s, v0.4s, #31
-; CHECK-NEXT:    cmge v0.4s, v0.4s, #0
-; CHECK-NEXT:    and v0.16b, v0.16b, v1.16b
+; CHECK-NEXT:    cmlt v0.4s, v0.4s, #0
+; CHECK-NEXT:    bic v0.4s, #1
 ; CHECK-NEXT:    ret
   %add = select <4 x i1> %cond, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
   ret <4 x i32> %add

llvm/test/CodeGen/X86/avx512-select.ll

@@ -411,7 +411,7 @@ define <16 x i16> @pr31515(<16 x i1> %a, <16 x i1> %b, <16 x i16> %c) nounwind {
 ; X86-AVX512F-NEXT:    vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
 ; X86-AVX512F-NEXT:    vpsllw $15, %ymm0, %ymm0
 ; X86-AVX512F-NEXT:    vpsraw $15, %ymm0, %ymm0
-; X86-AVX512F-NEXT:    vpandn %ymm2, %ymm0, %ymm0
+; X86-AVX512F-NEXT:    vpandn %ymm0, %ymm2, %ymm0
 ; X86-AVX512F-NEXT:    retl
 ;
 ; X64-AVX512F-LABEL: pr31515:
@@ -420,7 +420,7 @@ define <16 x i16> @pr31515(<16 x i1> %a, <16 x i1> %b, <16 x i16> %c) nounwind {
 ; X64-AVX512F-NEXT:    vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
 ; X64-AVX512F-NEXT:    vpsllw $15, %ymm0, %ymm0
 ; X64-AVX512F-NEXT:    vpsraw $15, %ymm0, %ymm0
-; X64-AVX512F-NEXT:    vpandn %ymm2, %ymm0, %ymm0
+; X64-AVX512F-NEXT:    vpandn %ymm0, %ymm2, %ymm0
 ; X64-AVX512F-NEXT:    retq
 ;
 ; X86-AVX512BW-LABEL: pr31515:

llvm/test/CodeGen/X86/avx512-vec-cmp.ll

@@ -1559,7 +1559,7 @@ define <2 x i32> @narrow_cmp_select_reverse(<2 x i64> %x, <2 x i32> %y) nounwind
 ; AVX512-NEXT:    vpcmpeqq %xmm2, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x29,0xc2]
 ; AVX512-NEXT:    vpshufd $232, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x70,0xc0,0xe8]
 ; AVX512-NEXT:    ## xmm0 = xmm0[0,2,2,3]
-; AVX512-NEXT:    vpandn %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xdf,0xc1]
+; AVX512-NEXT:    vpandn %xmm0, %xmm1, %xmm0 ## encoding: [0xc5,0xf1,0xdf,0xc0]
 ; AVX512-NEXT:    retq ## encoding: [0xc3]
 ;
 ; SKX-LABEL: narrow_cmp_select_reverse:

llvm/test/CodeGen/X86/avx512fp16-mov.ll

@@ -2483,7 +2483,7 @@ define <8 x i16> @pr59628_xmm(i16 %arg) {
 ; X64-NOVL:       # %bb.0:
 ; X64-NOVL-NEXT:    vmovw %edi, %xmm0
 ; X64-NOVL-NEXT:    vpcmpeqw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
-; X64-NOVL-NEXT:    vpandn %xmm0, %xmm1, %xmm0
+; X64-NOVL-NEXT:    vpandn %xmm1, %xmm0, %xmm0
 ; X64-NOVL-NEXT:    retq
   %I1 = insertelement <8 x i16> zeroinitializer, i16 %arg, i16 0
   %I2 = insertelement <8 x i16> %I1, i16 0, i16 %arg

llvm/test/CodeGen/X86/avxneconvert-intrinsics.ll

@@ -218,110 +218,108 @@ declare <8 x bfloat> @llvm.x86.vcvtneps2bf16256(<8 x float> %A)
 define <8 x bfloat> @select(i8 %x, <8 x bfloat> %y) nounwind {
 ; X64-LABEL: select:
 ; X64:       # %bb.0:
-; X64-NEXT:    vmovaps %xmm0, %xmm1 # encoding: [0xc5,0xf8,0x28,0xc8]
 ; X64-NEXT:    movb %dil, %al # encoding: [0x40,0x88,0xf8]
 ; X64-NEXT:    movb %al, -{{[0-9]+}}(%rsp) # encoding: [0x88,0x44,0x24,0xff]
 ; X64-NEXT:    movzbl -{{[0-9]+}}(%rsp), %eax # encoding: [0x0f,0xb6,0x44,0x24,0xff]
 ; X64-NEXT:    movl %eax, %ecx # encoding: [0x89,0xc1]
 ; X64-NEXT:    andl $1, %ecx # encoding: [0x83,0xe1,0x01]
 ; X64-NEXT:    negl %ecx # encoding: [0xf7,0xd9]
-; X64-NEXT:    vmovd %ecx, %xmm0 # encoding: [0xc5,0xf9,0x6e,0xc1]
+; X64-NEXT:    vmovd %ecx, %xmm1 # encoding: [0xc5,0xf9,0x6e,0xc9]
 ; X64-NEXT:    # kill: def $al killed $al killed $eax
 ; X64-NEXT:    movb %al, %cl # encoding: [0x88,0xc1]
 ; X64-NEXT:    shrb %cl # encoding: [0xd0,0xe9]
 ; X64-NEXT:    movzbl %cl, %ecx # encoding: [0x0f,0xb6,0xc9]
 ; X64-NEXT:    andl $1, %ecx # encoding: [0x83,0xe1,0x01]
 ; X64-NEXT:    negl %ecx # encoding: [0xf7,0xd9]
-; X64-NEXT:    vpinsrw $1, %ecx, %xmm0, %xmm0 # encoding: [0xc5,0xf9,0xc4,0xc1,0x01]
+; X64-NEXT:    vpinsrw $1, %ecx, %xmm1, %xmm1 # encoding: [0xc5,0xf1,0xc4,0xc9,0x01]
 ; X64-NEXT:    movb %al, %cl # encoding: [0x88,0xc1]
 ; X64-NEXT:    shrb $2, %cl # encoding: [0xc0,0xe9,0x02]
 ; X64-NEXT:    movzbl %cl, %ecx # encoding: [0x0f,0xb6,0xc9]
 ; X64-NEXT:    andl $1, %ecx # encoding: [0x83,0xe1,0x01]
 ; X64-NEXT:    negl %ecx # encoding: [0xf7,0xd9]
-; X64-NEXT:    vpinsrw $2, %ecx, %xmm0, %xmm0 # encoding: [0xc5,0xf9,0xc4,0xc1,0x02]
+; X64-NEXT:    vpinsrw $2, %ecx, %xmm1, %xmm1 # encoding: [0xc5,0xf1,0xc4,0xc9,0x02]
 ; X64-NEXT:    movb %al, %cl # encoding: [0x88,0xc1]
 ; X64-NEXT:    shrb $3, %cl # encoding: [0xc0,0xe9,0x03]
 ; X64-NEXT:    movzbl %cl, %ecx # encoding: [0x0f,0xb6,0xc9]
 ; X64-NEXT:    andl $1, %ecx # encoding: [0x83,0xe1,0x01]
 ; X64-NEXT:    negl %ecx # encoding: [0xf7,0xd9]
-; X64-NEXT:    vpinsrw $3, %ecx, %xmm0, %xmm0 # encoding: [0xc5,0xf9,0xc4,0xc1,0x03]
+; X64-NEXT:    vpinsrw $3, %ecx, %xmm1, %xmm1 # encoding: [0xc5,0xf1,0xc4,0xc9,0x03]
 ; X64-NEXT:    movb %al, %cl # encoding: [0x88,0xc1]
 ; X64-NEXT:    shrb $4, %cl # encoding: [0xc0,0xe9,0x04]
 ; X64-NEXT:    movzbl %cl, %ecx # encoding: [0x0f,0xb6,0xc9]
 ; X64-NEXT:    andl $1, %ecx # encoding: [0x83,0xe1,0x01]
 ; X64-NEXT:    negl %ecx # encoding: [0xf7,0xd9]
-; X64-NEXT:    vpinsrw $4, %ecx, %xmm0, %xmm0 # encoding: [0xc5,0xf9,0xc4,0xc1,0x04]
+; X64-NEXT:    vpinsrw $4, %ecx, %xmm1, %xmm1 # encoding: [0xc5,0xf1,0xc4,0xc9,0x04]
 ; X64-NEXT:    movb %al, %cl # encoding: [0x88,0xc1]
 ; X64-NEXT:    shrb $5, %cl # encoding: [0xc0,0xe9,0x05]
 ; X64-NEXT:    movzbl %cl, %ecx # encoding: [0x0f,0xb6,0xc9]
 ; X64-NEXT:    andl $1, %ecx # encoding: [0x83,0xe1,0x01]
 ; X64-NEXT:    negl %ecx # encoding: [0xf7,0xd9]
-; X64-NEXT:    vpinsrw $5, %ecx, %xmm0, %xmm0 # encoding: [0xc5,0xf9,0xc4,0xc1,0x05]
+; X64-NEXT:    vpinsrw $5, %ecx, %xmm1, %xmm1 # encoding: [0xc5,0xf1,0xc4,0xc9,0x05]
 ; X64-NEXT:    movb %al, %cl # encoding: [0x88,0xc1]
 ; X64-NEXT:    shrb $6, %cl # encoding: [0xc0,0xe9,0x06]
 ; X64-NEXT:    movzbl %cl, %ecx # encoding: [0x0f,0xb6,0xc9]
 ; X64-NEXT:    andl $1, %ecx # encoding: [0x83,0xe1,0x01]
 ; X64-NEXT:    negl %ecx # encoding: [0xf7,0xd9]
-; X64-NEXT:    vpinsrw $6, %ecx, %xmm0, %xmm0 # encoding: [0xc5,0xf9,0xc4,0xc1,0x06]
+; X64-NEXT:    vpinsrw $6, %ecx, %xmm1, %xmm1 # encoding: [0xc5,0xf1,0xc4,0xc9,0x06]
 ; X64-NEXT:    shrb $7, %al # encoding: [0xc0,0xe8,0x07]
 ; X64-NEXT:    movzbl %al, %eax # encoding: [0x0f,0xb6,0xc0]
 ; X64-NEXT:    negl %eax # encoding: [0xf7,0xd8]
-; X64-NEXT:    vpinsrw $7, %eax, %xmm0, %xmm0 # encoding: [0xc5,0xf9,0xc4,0xc0,0x07]
+; X64-NEXT:    vpinsrw $7, %eax, %xmm1, %xmm1 # encoding: [0xc5,0xf1,0xc4,0xc8,0x07]
 ; X64-NEXT:    vpandn %xmm1, %xmm0, %xmm0 # encoding: [0xc5,0xf9,0xdf,0xc1]
 ; X64-NEXT:    retq # encoding: [0xc3]
 ;
 ; X86-LABEL: select:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %eax # encoding: [0x50]
-; X86-NEXT:    vmovaps %xmm0, %xmm1 # encoding: [0xc5,0xf8,0x28,0xc8]
 ; X86-NEXT:    movb {{[0-9]+}}(%esp), %al # encoding: [0x8a,0x44,0x24,0x08]
 ; X86-NEXT:    movb %al, {{[0-9]+}}(%esp) # encoding: [0x88,0x44,0x24,0x03]
 ; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax # encoding: [0x0f,0xb6,0x44,0x24,0x03]
 ; X86-NEXT:    movl %eax, %ecx # encoding: [0x89,0xc1]
 ; X86-NEXT:    andl $1, %ecx # encoding: [0x83,0xe1,0x01]
 ; X86-NEXT:    negl %ecx # encoding: [0xf7,0xd9]
-; X86-NEXT:    vmovd %ecx, %xmm0 # encoding: [0xc5,0xf9,0x6e,0xc1]
+; X86-NEXT:    vmovd %ecx, %xmm1 # encoding: [0xc5,0xf9,0x6e,0xc9]
 ; X86-NEXT:    # kill: def $al killed $al killed $eax
 ; X86-NEXT:    movb %al, %cl # encoding: [0x88,0xc1]
 ; X86-NEXT:    shrb %cl # encoding: [0xd0,0xe9]
 ; X86-NEXT:    movzbl %cl, %ecx # encoding: [0x0f,0xb6,0xc9]
 ; X86-NEXT:    andl $1, %ecx # encoding: [0x83,0xe1,0x01]
 ; X86-NEXT:    negl %ecx # encoding: [0xf7,0xd9]
-; X86-NEXT:    vpinsrw $1, %ecx, %xmm0, %xmm0 # encoding: [0xc5,0xf9,0xc4,0xc1,0x01]
+; X86-NEXT:    vpinsrw $1, %ecx, %xmm1, %xmm1 # encoding: [0xc5,0xf1,0xc4,0xc9,0x01]
 ; X86-NEXT:    movb %al, %cl # encoding: [0x88,0xc1]
 ; X86-NEXT:    shrb $2, %cl # encoding: [0xc0,0xe9,0x02]
 ; X86-NEXT:    movzbl %cl, %ecx # encoding: [0x0f,0xb6,0xc9]
 ; X86-NEXT:    andl $1, %ecx # encoding: [0x83,0xe1,0x01]
 ; X86-NEXT:    negl %ecx # encoding: [0xf7,0xd9]
-; X86-NEXT:    vpinsrw $2, %ecx, %xmm0, %xmm0 # encoding: [0xc5,0xf9,0xc4,0xc1,0x02]
+; X86-NEXT:    vpinsrw $2, %ecx, %xmm1, %xmm1 # encoding: [0xc5,0xf1,0xc4,0xc9,0x02]
 ; X86-NEXT:    movb %al, %cl # encoding: [0x88,0xc1]
 ; X86-NEXT:    shrb $3, %cl # encoding: [0xc0,0xe9,0x03]
 ; X86-NEXT:    movzbl %cl, %ecx # encoding: [0x0f,0xb6,0xc9]
 ; X86-NEXT:    andl $1, %ecx # encoding: [0x83,0xe1,0x01]
 ; X86-NEXT:    negl %ecx # encoding: [0xf7,0xd9]
-; X86-NEXT:    vpinsrw $3, %ecx, %xmm0, %xmm0 # encoding: [0xc5,0xf9,0xc4,0xc1,0x03]
+; X86-NEXT:    vpinsrw $3, %ecx, %xmm1, %xmm1 # encoding: [0xc5,0xf1,0xc4,0xc9,0x03]
 ; X86-NEXT:    movb %al, %cl # encoding: [0x88,0xc1]
 ; X86-NEXT:    shrb $4, %cl # encoding: [0xc0,0xe9,0x04]
 ; X86-NEXT:    movzbl %cl, %ecx # encoding: [0x0f,0xb6,0xc9]
 ; X86-NEXT:    andl $1, %ecx # encoding: [0x83,0xe1,0x01]
 ; X86-NEXT:    negl %ecx # encoding: [0xf7,0xd9]
-; X86-NEXT:    vpinsrw $4, %ecx, %xmm0, %xmm0 # encoding: [0xc5,0xf9,0xc4,0xc1,0x04]
+; X86-NEXT:    vpinsrw $4, %ecx, %xmm1, %xmm1 # encoding: [0xc5,0xf1,0xc4,0xc9,0x04]
 ; X86-NEXT:    movb %al, %cl # encoding: [0x88,0xc1]
 ; X86-NEXT:    shrb $5, %cl # encoding: [0xc0,0xe9,0x05]
 ; X86-NEXT:    movzbl %cl, %ecx # encoding: [0x0f,0xb6,0xc9]
 ; X86-NEXT:    andl $1, %ecx # encoding: [0x83,0xe1,0x01]
 ; X86-NEXT:    negl %ecx # encoding: [0xf7,0xd9]
-; X86-NEXT:    vpinsrw $5, %ecx, %xmm0, %xmm0 # encoding: [0xc5,0xf9,0xc4,0xc1,0x05]
+; X86-NEXT:    vpinsrw $5, %ecx, %xmm1, %xmm1 # encoding: [0xc5,0xf1,0xc4,0xc9,0x05]
 ; X86-NEXT:    movb %al, %cl # encoding: [0x88,0xc1]
 ; X86-NEXT:    shrb $6, %cl # encoding: [0xc0,0xe9,0x06]
 ; X86-NEXT:    movzbl %cl, %ecx # encoding: [0x0f,0xb6,0xc9]
 ; X86-NEXT:    andl $1, %ecx # encoding: [0x83,0xe1,0x01]
 ; X86-NEXT:    negl %ecx # encoding: [0xf7,0xd9]
-; X86-NEXT:    vpinsrw $6, %ecx, %xmm0, %xmm0 # encoding: [0xc5,0xf9,0xc4,0xc1,0x06]
+; X86-NEXT:    vpinsrw $6, %ecx, %xmm1, %xmm1 # encoding: [0xc5,0xf1,0xc4,0xc9,0x06]
 ; X86-NEXT:    shrb $7, %al # encoding: [0xc0,0xe8,0x07]
 ; X86-NEXT:    movzbl %al, %eax # encoding: [0x0f,0xb6,0xc0]
 ; X86-NEXT:    negl %eax # encoding: [0xf7,0xd8]
-; X86-NEXT:    vpinsrw $7, %eax, %xmm0, %xmm0 # encoding: [0xc5,0xf9,0xc4,0xc0,0x07]
+; X86-NEXT:    vpinsrw $7, %eax, %xmm1, %xmm1 # encoding: [0xc5,0xf1,0xc4,0xc8,0x07]
 ; X86-NEXT:    vpandn %xmm1, %xmm0, %xmm0 # encoding: [0xc5,0xf9,0xdf,0xc1]
 ; X86-NEXT:    popl %eax # encoding: [0x58]
 ; X86-NEXT:    retl # encoding: [0xc3]