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antoniofrighettoantoniofrighetto
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[clang][CodeGen][AA] Add !llvm.errno.tbaa listing int-compatible TBAA nodes
Model integer accesses through an ad-hoc TBAA module-level metadata, so as to disambiguate integer accesses from non-integer ones. This is purposefully as part of representing `errno`, which is guaranteed to be accessed with integer-compatible TBAA. Ensure `AA::getModRefInfo` masks out `errnomem` when TBAA proves there is no alias with errno.
1 parent 8885b5c commit 38b244c

33 files changed

+1030
-881
lines changed

‎clang/lib/CodeGen/CodeGenModule.cpp

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -83,6 +83,7 @@ static llvm::cl::opt<bool> LimitedCoverage(
8383
llvm::cl::desc("Emit limited coverage mapping information (experimental)"));
8484

8585
static const char AnnotationSection[] = "llvm.metadata";
86+
static constexpr auto ErrnoTBAAMDName = "llvm.errno.tbaa";
8687

8788
static CGCXXABI *createCXXABI(CodeGenModule &CGM) {
8889
switch (CGM.getContext().getCXXABIKind()) {
@@ -1458,6 +1459,17 @@ void CodeGenModule::Release() {
14581459
}
14591460
}
14601461
}
1462+
1463+
// Emit `!llvm.errno.tbaa`, a module-level metadata that specifies the TBAA
1464+
// for an integer access.
1465+
if (TBAA) {
1466+
TBAAAccessInfo TBAAInfo = getTBAAAccessInfo(Context.IntTy);
1467+
llvm::MDNode *IntegerNode = getTBAAAccessTagInfo(TBAAInfo);
1468+
if (IntegerNode) {
1469+
auto *ErrnoTBAAMD = TheModule.getOrInsertNamedMetadata(ErrnoTBAAMDName);
1470+
ErrnoTBAAMD->addOperand(IntegerNode);
1471+
}
1472+
}
14611473
}
14621474

14631475
void CodeGenModule::EmitOpenCLMetadata() {

‎clang/test/CodeGen/AArch64/ABI-align-packed.c

Lines changed: 19 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
1+
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
12
// REQUIRES: aarch64-registered-target
23
// RUN: %clang_cc1 -triple aarch64 -target-feature +neon -emit-llvm -O2 -o - %s | FileCheck %s
34
#include <stdarg.h>
@@ -58,8 +59,8 @@ struct non_packed_struct gs_non_packed_struct;
5859
// CHECK-SAME: (double [[D0:%.*]], double [[D1:%.*]], double [[D2:%.*]], double [[D3:%.*]], double [[D4:%.*]], double [[D5:%.*]], double [[D6:%.*]], double [[D7:%.*]], double noundef [[D8:%.*]], [1 x <8 x i16>] alignstack(16) [[S_NON_PACKED_STRUCT_COERCE:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
5960
// CHECK-NEXT: entry:
6061
// CHECK-NEXT: [[S_NON_PACKED_STRUCT_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [1 x <8 x i16>] [[S_NON_PACKED_STRUCT_COERCE]], 0
61-
// CHECK-NEXT: store double [[D8]], ptr @gd, align 8, !tbaa [[TBAA2:![0-9]+]]
62-
// CHECK-NEXT: store <8 x i16> [[S_NON_PACKED_STRUCT_COERCE_FCA_0_EXTRACT]], ptr @gs_non_packed_struct, align 16, !tbaa [[TBAA6:![0-9]+]]
62+
// CHECK-NEXT: store double [[D8]], ptr @gd, align 8, !tbaa [[TBAA6:![0-9]+]]
63+
// CHECK-NEXT: store <8 x i16> [[S_NON_PACKED_STRUCT_COERCE_FCA_0_EXTRACT]], ptr @gs_non_packed_struct, align 16, !tbaa [[TBAA8:![0-9]+]]
6364
// CHECK-NEXT: ret void
6465
__attribute__((noinline)) void named_arg_non_packed_struct(double d0, double d1, double d2, double d3,
6566
double d4, double d5, double d6, double d7,
@@ -113,8 +114,8 @@ struct packed_struct gs_packed_struct;
113114
// CHECK-SAME: (double [[D0:%.*]], double [[D1:%.*]], double [[D2:%.*]], double [[D3:%.*]], double [[D4:%.*]], double [[D5:%.*]], double [[D6:%.*]], double [[D7:%.*]], double noundef [[D8:%.*]], [1 x <8 x i16>] alignstack(8) [[S_PACKED_STRUCT_COERCE:%.*]]) local_unnamed_addr #[[ATTR0]] {
114115
// CHECK-NEXT: entry:
115116
// CHECK-NEXT: [[S_PACKED_STRUCT_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [1 x <8 x i16>] [[S_PACKED_STRUCT_COERCE]], 0
116-
// CHECK-NEXT: store double [[D8]], ptr @gd, align 8, !tbaa [[TBAA2]]
117-
// CHECK-NEXT: store <8 x i16> [[S_PACKED_STRUCT_COERCE_FCA_0_EXTRACT]], ptr @gs_packed_struct, align 1, !tbaa [[TBAA6]]
117+
// CHECK-NEXT: store double [[D8]], ptr @gd, align 8, !tbaa [[TBAA6]]
118+
// CHECK-NEXT: store <8 x i16> [[S_PACKED_STRUCT_COERCE_FCA_0_EXTRACT]], ptr @gs_packed_struct, align 1, !tbaa [[TBAA8]]
118119
// CHECK-NEXT: ret void
119120
__attribute__((noinline)) void named_arg_packed_struct(double d0, double d1, double d2, double d3,
120121
double d4, double d5, double d6, double d7,
@@ -168,8 +169,8 @@ struct packed_member gs_packed_member;
168169
// CHECK-SAME: (double [[D0:%.*]], double [[D1:%.*]], double [[D2:%.*]], double [[D3:%.*]], double [[D4:%.*]], double [[D5:%.*]], double [[D6:%.*]], double [[D7:%.*]], double noundef [[D8:%.*]], [1 x <8 x i16>] alignstack(8) [[S_PACKED_MEMBER_COERCE:%.*]]) local_unnamed_addr #[[ATTR0]] {
169170
// CHECK-NEXT: entry:
170171
// CHECK-NEXT: [[S_PACKED_MEMBER_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [1 x <8 x i16>] [[S_PACKED_MEMBER_COERCE]], 0
171-
// CHECK-NEXT: store double [[D8]], ptr @gd, align 8, !tbaa [[TBAA2]]
172-
// CHECK-NEXT: store <8 x i16> [[S_PACKED_MEMBER_COERCE_FCA_0_EXTRACT]], ptr @gs_packed_member, align 1, !tbaa [[TBAA6]]
172+
// CHECK-NEXT: store double [[D8]], ptr @gd, align 8, !tbaa [[TBAA6]]
173+
// CHECK-NEXT: store <8 x i16> [[S_PACKED_MEMBER_COERCE_FCA_0_EXTRACT]], ptr @gs_packed_member, align 1, !tbaa [[TBAA8]]
173174
// CHECK-NEXT: ret void
174175
__attribute__((noinline)) void named_arg_packed_member(double d0, double d1, double d2, double d3,
175176
double d4, double d5, double d6, double d7,
@@ -223,8 +224,8 @@ struct aligned_struct_8 gs_aligned_struct_8;
223224
// CHECK-SAME: (double [[D0:%.*]], double [[D1:%.*]], double [[D2:%.*]], double [[D3:%.*]], double [[D4:%.*]], double [[D5:%.*]], double [[D6:%.*]], double [[D7:%.*]], double noundef [[D8:%.*]], [1 x <8 x i16>] alignstack(16) [[S_ALIGNED_STRUCT_8_COERCE:%.*]]) local_unnamed_addr #[[ATTR0]] {
224225
// CHECK-NEXT: entry:
225226
// CHECK-NEXT: [[S_ALIGNED_STRUCT_8_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [1 x <8 x i16>] [[S_ALIGNED_STRUCT_8_COERCE]], 0
226-
// CHECK-NEXT: store double [[D8]], ptr @gd, align 8, !tbaa [[TBAA2]]
227-
// CHECK-NEXT: store <8 x i16> [[S_ALIGNED_STRUCT_8_COERCE_FCA_0_EXTRACT]], ptr @gs_aligned_struct_8, align 16, !tbaa [[TBAA6]]
227+
// CHECK-NEXT: store double [[D8]], ptr @gd, align 8, !tbaa [[TBAA6]]
228+
// CHECK-NEXT: store <8 x i16> [[S_ALIGNED_STRUCT_8_COERCE_FCA_0_EXTRACT]], ptr @gs_aligned_struct_8, align 16, !tbaa [[TBAA8]]
228229
// CHECK-NEXT: ret void
229230
__attribute__((noinline)) void named_arg_aligned_struct_8(double d0, double d1, double d2, double d3,
230231
double d4, double d5, double d6, double d7,
@@ -278,8 +279,8 @@ struct aligned_member_8 gs_aligned_member_8;
278279
// CHECK-SAME: (double [[D0:%.*]], double [[D1:%.*]], double [[D2:%.*]], double [[D3:%.*]], double [[D4:%.*]], double [[D5:%.*]], double [[D6:%.*]], double [[D7:%.*]], double noundef [[D8:%.*]], [1 x <8 x i16>] alignstack(16) [[S_ALIGNED_MEMBER_8_COERCE:%.*]]) local_unnamed_addr #[[ATTR0]] {
279280
// CHECK-NEXT: entry:
280281
// CHECK-NEXT: [[S_ALIGNED_MEMBER_8_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [1 x <8 x i16>] [[S_ALIGNED_MEMBER_8_COERCE]], 0
281-
// CHECK-NEXT: store double [[D8]], ptr @gd, align 8, !tbaa [[TBAA2]]
282-
// CHECK-NEXT: store <8 x i16> [[S_ALIGNED_MEMBER_8_COERCE_FCA_0_EXTRACT]], ptr @gs_aligned_member_8, align 16, !tbaa [[TBAA6]]
282+
// CHECK-NEXT: store double [[D8]], ptr @gd, align 8, !tbaa [[TBAA6]]
283+
// CHECK-NEXT: store <8 x i16> [[S_ALIGNED_MEMBER_8_COERCE_FCA_0_EXTRACT]], ptr @gs_aligned_member_8, align 16, !tbaa [[TBAA8]]
283284
// CHECK-NEXT: ret void
284285
__attribute__((noinline)) void named_arg_aligned_member_8(double d0, double d1, double d2, double d3,
285286
double d4, double d5, double d6, double d7,
@@ -333,8 +334,8 @@ struct pragma_packed_struct_8 gs_pragma_packed_struct_8;
333334
// CHECK-SAME: (double [[D0:%.*]], double [[D1:%.*]], double [[D2:%.*]], double [[D3:%.*]], double [[D4:%.*]], double [[D5:%.*]], double [[D6:%.*]], double [[D7:%.*]], double noundef [[D8:%.*]], [1 x <8 x i16>] alignstack(8) [[S_PRAGMA_PACKED_STRUCT_8_COERCE:%.*]]) local_unnamed_addr #[[ATTR0]] {
334335
// CHECK-NEXT: entry:
335336
// CHECK-NEXT: [[S_PRAGMA_PACKED_STRUCT_8_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [1 x <8 x i16>] [[S_PRAGMA_PACKED_STRUCT_8_COERCE]], 0
336-
// CHECK-NEXT: store double [[D8]], ptr @gd, align 8, !tbaa [[TBAA2]]
337-
// CHECK-NEXT: store <8 x i16> [[S_PRAGMA_PACKED_STRUCT_8_COERCE_FCA_0_EXTRACT]], ptr @gs_pragma_packed_struct_8, align 8, !tbaa [[TBAA6]]
337+
// CHECK-NEXT: store double [[D8]], ptr @gd, align 8, !tbaa [[TBAA6]]
338+
// CHECK-NEXT: store <8 x i16> [[S_PRAGMA_PACKED_STRUCT_8_COERCE_FCA_0_EXTRACT]], ptr @gs_pragma_packed_struct_8, align 8, !tbaa [[TBAA8]]
338339
// CHECK-NEXT: ret void
339340
__attribute__((noinline)) void named_arg_pragma_packed_struct_8(double d0, double d1, double d2, double d3,
340341
double d4, double d5, double d6, double d7,
@@ -388,8 +389,8 @@ struct pragma_packed_struct_4 gs_pragma_packed_struct_4;
388389
// CHECK-SAME: (double [[D0:%.*]], double [[D1:%.*]], double [[D2:%.*]], double [[D3:%.*]], double [[D4:%.*]], double [[D5:%.*]], double [[D6:%.*]], double [[D7:%.*]], double noundef [[D8:%.*]], [1 x <8 x i16>] alignstack(8) [[S_PRAGMA_PACKED_STRUCT_4_COERCE:%.*]]) local_unnamed_addr #[[ATTR0]] {
389390
// CHECK-NEXT: entry:
390391
// CHECK-NEXT: [[S_PRAGMA_PACKED_STRUCT_4_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [1 x <8 x i16>] [[S_PRAGMA_PACKED_STRUCT_4_COERCE]], 0
391-
// CHECK-NEXT: store double [[D8]], ptr @gd, align 8, !tbaa [[TBAA2]]
392-
// CHECK-NEXT: store <8 x i16> [[S_PRAGMA_PACKED_STRUCT_4_COERCE_FCA_0_EXTRACT]], ptr @gs_pragma_packed_struct_4, align 4, !tbaa [[TBAA6]]
392+
// CHECK-NEXT: store double [[D8]], ptr @gd, align 8, !tbaa [[TBAA6]]
393+
// CHECK-NEXT: store <8 x i16> [[S_PRAGMA_PACKED_STRUCT_4_COERCE_FCA_0_EXTRACT]], ptr @gs_pragma_packed_struct_4, align 4, !tbaa [[TBAA8]]
393394
// CHECK-NEXT: ret void
394395
__attribute__((noinline)) void named_arg_pragma_packed_struct_4(double d0, double d1, double d2, double d3,
395396
double d4, double d5, double d6, double d7,
@@ -437,9 +438,9 @@ void test_pragma_packed_struct_4() {
437438
variadic_pragma_packed_struct_4(1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 2.0, s_pragma_packed_struct_4);
438439
}
439440
//.
440-
// CHECK: [[TBAA2]] = !{[[META3:![0-9]+]], [[META3]], i64 0}
441-
// CHECK: [[META3]] = !{!"double", [[META4:![0-9]+]], i64 0}
442-
// CHECK: [[META4]] = !{!"omnipotent char", [[META5:![0-9]+]], i64 0}
441+
// CHECK: [[META4:![0-9]+]] = !{!"omnipotent char", [[META5:![0-9]+]], i64 0}
443442
// CHECK: [[META5]] = !{!"Simple C/C++ TBAA"}
444-
// CHECK: [[TBAA6]] = !{[[META4]], [[META4]], i64 0}
443+
// CHECK: [[TBAA6]] = !{[[META7:![0-9]+]], [[META7]], i64 0}
444+
// CHECK: [[META7]] = !{!"double", [[META4]], i64 0}
445+
// CHECK: [[TBAA8]] = !{[[META4]], [[META4]], i64 0}
445446
//.

‎clang/test/CodeGen/AArch64/fp8-init-list.c

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -35,27 +35,27 @@ struct S s;
3535
// CHECK-SAME: <1 x i8> [[X:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] {
3636
// CHECK-NEXT: [[ENTRY:.*:]]
3737
// CHECK-NEXT: [[TMP0:%.*]] = extractelement <1 x i8> [[X]], i64 0
38-
// CHECK-NEXT: store i8 [[TMP0]], ptr @s, align 1, !tbaa [[TBAA2:![0-9]+]]
38+
// CHECK-NEXT: store i8 [[TMP0]], ptr @s, align 1, !tbaa [[TBAA6:![0-9]+]]
3939
// CHECK-NEXT: ret void
4040
//
4141
// CHECK-CXX-LABEL: define dso_local void @_Z1fu6__mfp8(
4242
// CHECK-CXX-SAME: <1 x i8> [[X:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] {
4343
// CHECK-CXX-NEXT: [[ENTRY:.*:]]
4444
// CHECK-CXX-NEXT: [[TMP0:%.*]] = extractelement <1 x i8> [[X]], i64 0
45-
// CHECK-CXX-NEXT: store i8 [[TMP0]], ptr @s, align 1, !tbaa [[TBAA2:![0-9]+]]
45+
// CHECK-CXX-NEXT: store i8 [[TMP0]], ptr @s, align 1, !tbaa [[TBAA6:![0-9]+]]
4646
// CHECK-CXX-NEXT: ret void
4747
//
4848
void f(__mfp8 x) {
4949
s = (struct S){x};
5050
}
5151
//.
52-
// CHECK: [[TBAA2]] = !{[[META3:![0-9]+]], [[META3]], i64 0}
53-
// CHECK: [[META3]] = !{!"__mfp8", [[META4:![0-9]+]], i64 0}
54-
// CHECK: [[META4]] = !{!"omnipotent char", [[META5:![0-9]+]], i64 0}
52+
// CHECK: [[META4:![0-9]+]] = !{!"omnipotent char", [[META5:![0-9]+]], i64 0}
5553
// CHECK: [[META5]] = !{!"Simple C/C++ TBAA"}
54+
// CHECK: [[TBAA6]] = !{[[META7:![0-9]+]], [[META7]], i64 0}
55+
// CHECK: [[META7]] = !{!"__mfp8", [[META4]], i64 0}
5656
//.
57-
// CHECK-CXX: [[TBAA2]] = !{[[META3:![0-9]+]], [[META3]], i64 0}
58-
// CHECK-CXX: [[META3]] = !{!"__mfp8", [[META4:![0-9]+]], i64 0}
59-
// CHECK-CXX: [[META4]] = !{!"omnipotent char", [[META5:![0-9]+]], i64 0}
57+
// CHECK-CXX: [[META4:![0-9]+]] = !{!"omnipotent char", [[META5:![0-9]+]], i64 0}
6058
// CHECK-CXX: [[META5]] = !{!"Simple C++ TBAA"}
59+
// CHECK-CXX: [[TBAA6]] = !{[[META7:![0-9]+]], [[META7]], i64 0}
60+
// CHECK-CXX: [[META7]] = !{!"__mfp8", [[META4]], i64 0}
6161
//.

‎clang/test/CodeGen/LoongArch/inline-asm-operand-modifiers.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@
66

77
// CHECK-LABEL: @test_z_zero(
88
// CHECK-NEXT: entry:
9-
// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 asm sideeffect "add.w $0, $1, ${2:z}", "=r,r,ri"(i32 [[A:%.*]], i32 0) #[[ATTR1:[0-9]+]], !srcloc !2
9+
// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 asm sideeffect "add.w $0, $1, ${2:z}", "=r,r,ri"(i32 [[A:%.*]], i32 0) #[[ATTR1:[0-9]+]], !srcloc [[META6:![0-9]+]]
1010
// CHECK-NEXT: ret void
1111
//
1212
void test_z_zero(int a) {
@@ -16,7 +16,7 @@ void test_z_zero(int a) {
1616

1717
// CHECK-LABEL: @test_z_nonzero(
1818
// CHECK-NEXT: entry:
19-
// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 asm sideeffect "add.w $0, $1, ${2:z}", "=r,r,ri"(i32 [[A:%.*]], i32 1) #[[ATTR1]], !srcloc !3
19+
// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 asm sideeffect "add.w $0, $1, ${2:z}", "=r,r,ri"(i32 [[A:%.*]], i32 1) #[[ATTR1]], !srcloc [[META7:![0-9]+]]
2020
// CHECK-NEXT: ret void
2121
//
2222
void test_z_nonzero(int a) {

‎clang/test/CodeGen/LoongArch/lasx/inline-asm-gcc-regs.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -4,31 +4,31 @@
44
typedef signed char v32i8 __attribute__((vector_size(32), aligned(32)));
55

66
// CHECK-LABEL: @test_xr0(
7-
// CHECK: tail call void asm sideeffect "", "{$xr0}"(<32 x i8> undef) #[[ATTR1:[0-9]+]], !srcloc !2
7+
// CHECK: tail call void asm sideeffect "", "{$xr0}"(<32 x i8> undef) #[[ATTR1:[0-9]+]], !srcloc [[META6:![0-9]+]]
88
//
99
void test_xr0() {
1010
register v32i8 a asm ("$xr0");
1111
asm ("" :: "f"(a));
1212
}
1313

1414
// CHECK-LABEL: @test_xr7(
15-
// CHECK: tail call void asm sideeffect "", "{$xr7}"(<32 x i8> undef) #[[ATTR1]], !srcloc !3
15+
// CHECK: tail call void asm sideeffect "", "{$xr7}"(<32 x i8> undef) #[[ATTR1]], !srcloc [[META7:![0-9]+]]
1616
//
1717
void test_xr7() {
1818
register v32i8 a asm ("$xr7");
1919
asm ("" :: "f"(a));
2020
}
2121

2222
// CHECK-LABEL: @test_xr15(
23-
// CHECK: tail call void asm sideeffect "", "{$xr15}"(<32 x i8> undef) #[[ATTR1]], !srcloc !4
23+
// CHECK: tail call void asm sideeffect "", "{$xr15}"(<32 x i8> undef) #[[ATTR1]], !srcloc [[META8:![0-9]+]]
2424
//
2525
void test_xr15() {
2626
register v32i8 a asm ("$xr15");
2727
asm ("" :: "f"(a));
2828
}
2929

3030
// CHECK-LABEL: @test_xr31(
31-
// CHECK: tail call void asm sideeffect "", "{$xr31}"(<32 x i8> undef) #[[ATTR1]], !srcloc !5
31+
// CHECK: tail call void asm sideeffect "", "{$xr31}"(<32 x i8> undef) #[[ATTR1]], !srcloc [[META9:![0-9]+]]
3232
//
3333
void test_xr31() {
3434
register v32i8 a asm ("$xr31");

‎clang/test/CodeGen/LoongArch/lasx/inline-asm-operand-modifier.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ typedef long long v4i64 __attribute__ ((vector_size(32), aligned(32)));
66
// CHECK-LABEL: define dso_local void @test_u
77
// CHECK-SAME: () local_unnamed_addr #[[ATTR0:[0-9]+]] {
88
// CHECK-NEXT: entry:
9-
// CHECK-NEXT: [[TMP0:%.*]] = tail call <4 x i64> asm sideeffect "xvldi ${0:u}, 1", "=f"() #[[ATTR1:[0-9]+]], !srcloc !2
9+
// CHECK-NEXT: [[TMP0:%.*]] = tail call <4 x i64> asm sideeffect "xvldi ${0:u}, 1", "=f"() #[[ATTR1:[0-9]+]], !srcloc [[META6:![0-9]+]]
1010
// CHECK-NEXT: ret void
1111
//
1212
void test_u() {

‎clang/test/CodeGen/LoongArch/lsx/inline-asm-gcc-regs.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -4,31 +4,31 @@
44
typedef signed char v16i8 __attribute__((vector_size(16), aligned(16)));
55

66
// CHECK-LABEL: @test_vr0(
7-
// CHECK: tail call void asm sideeffect "", "{$vr0}"(<16 x i8> undef) #[[ATTR1:[0-9]+]], !srcloc !2
7+
// CHECK: tail call void asm sideeffect "", "{$vr0}"(<16 x i8> undef) #[[ATTR1:[0-9]+]], !srcloc [[META6:![0-9]+]]
88
//
99
void test_vr0() {
1010
register v16i8 a asm ("$vr0");
1111
asm ("" :: "f"(a));
1212
}
1313

1414
// CHECK-LABEL: @test_vr7(
15-
// CHECK: tail call void asm sideeffect "", "{$vr7}"(<16 x i8> undef) #[[ATTR1]], !srcloc !3
15+
// CHECK: tail call void asm sideeffect "", "{$vr7}"(<16 x i8> undef) #[[ATTR1]], !srcloc [[META7:![0-9]+]]
1616
//
1717
void test_vr7() {
1818
register v16i8 a asm ("$vr7");
1919
asm ("" :: "f"(a));
2020
}
2121

2222
// CHECK-LABEL: @test_vr15(
23-
// CHECK: tail call void asm sideeffect "", "{$vr15}"(<16 x i8> undef) #[[ATTR1]], !srcloc !4
23+
// CHECK: tail call void asm sideeffect "", "{$vr15}"(<16 x i8> undef) #[[ATTR1]], !srcloc [[META8:![0-9]+]]
2424
//
2525
void test_vr15() {
2626
register v16i8 a asm ("$vr15");
2727
asm ("" :: "f"(a));
2828
}
2929

3030
// CHECK-LABEL: @test_vr31(
31-
// CHECK: tail call void asm sideeffect "", "{$vr31}"(<16 x i8> undef) #[[ATTR1]], !srcloc !5
31+
// CHECK: tail call void asm sideeffect "", "{$vr31}"(<16 x i8> undef) #[[ATTR1]], !srcloc [[META9:![0-9]+]]
3232
//
3333
void test_vr31() {
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register v16i8 a asm ("$vr31");

‎clang/test/CodeGen/LoongArch/lsx/inline-asm-operand-modifier.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ typedef long long v2i64 __attribute__ ((vector_size(16), aligned(16)));
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// CHECK-LABEL: define dso_local void @test_w
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// CHECK-SAME: () local_unnamed_addr #[[ATTR0:[0-9]+]] {
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// CHECK-NEXT: entry:
9-
// CHECK-NEXT: [[TMP0:%.*]] = tail call <2 x i64> asm sideeffect "vldi ${0:w}, 1", "=f"() #[[ATTR1:[0-9]+]], !srcloc !2
9+
// CHECK-NEXT: [[TMP0:%.*]] = tail call <2 x i64> asm sideeffect "vldi ${0:w}, 1", "=f"() #[[ATTR1:[0-9]+]], !srcloc [[META6:![0-9]+]]
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// CHECK-NEXT: ret void
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//
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void test_w() {

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