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Propagate depth correctly
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-6
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llvm/lib/Target/AMDGPU/SIISelLowering.cpp

Lines changed: 7 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -16785,7 +16785,7 @@ static void knownBitsForWorkitemID(const GCNSubtarget &ST,
1678516785

1678616786
static void knownBitsForSBFE(const MachineInstr &MI, GISelValueTracking &VT,
1678716787
KnownBits &Known, const APInt &DemandedElts,
16788-
unsigned BFEWidth, bool SExt) {
16788+
unsigned BFEWidth, bool SExt, unsigned Depth) {
1678916789
const MachineRegisterInfo &MRI = VT.getMachineFunction().getRegInfo();
1679016790
const MachineOperand &Src1 = MI.getOperand(2);
1679116791

@@ -16807,7 +16807,8 @@ static void knownBitsForSBFE(const MachineInstr &MI, GISelValueTracking &VT,
1680716807
Src1Cst & maskTrailingOnes<unsigned>((BFEWidth == 32) ? 5 : 6);
1680816808
const unsigned Width = (Src1Cst >> 16) & maskTrailingOnes<unsigned>(6);
1680916809

16810-
VT.computeKnownBitsImpl(MI.getOperand(1).getReg(), Known, DemandedElts);
16810+
VT.computeKnownBitsImpl(MI.getOperand(1).getReg(), Known, DemandedElts,
16811+
Depth + 1);
1681116812

1681216813
Known.Zero = Known.Zero.lshr(Offset);
1681316814
Known.One = Known.One.lshr(Offset);
@@ -16829,16 +16830,16 @@ void SITargetLowering::computeKnownBitsForTargetInstr(
1682916830
switch (MI->getOpcode()) {
1683016831
case AMDGPU::S_BFE_I32:
1683116832
return knownBitsForSBFE(*MI, VT, Known, DemandedElts, /*Width=*/32,
16832-
/*SExt=*/true);
16833+
/*SExt=*/true, Depth);
1683316834
case AMDGPU::S_BFE_U32:
1683416835
return knownBitsForSBFE(*MI, VT, Known, DemandedElts, /*Width=*/32,
16835-
/*SExt=*/false);
16836+
/*SExt=*/false, Depth);
1683616837
case AMDGPU::S_BFE_I64:
1683716838
return knownBitsForSBFE(*MI, VT, Known, DemandedElts, /*Width=*/64,
16838-
/*SExt=*/true);
16839+
/*SExt=*/true, Depth);
1683916840
case AMDGPU::S_BFE_U64:
1684016841
return knownBitsForSBFE(*MI, VT, Known, DemandedElts, /*Width=*/64,
16841-
/*SExt=*/false);
16842+
/*SExt=*/false, Depth);
1684216843
case AMDGPU::G_INTRINSIC:
1684316844
case AMDGPU::G_INTRINSIC_CONVERGENT: {
1684416845
Intrinsic::ID IID = cast<GIntrinsic>(MI)->getIntrinsicID();

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