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Move relocation specifier constants to AArch64::
Rename these relocation specifier constants, aligning with the naming convention used by other targets (`S_` instead of `VK_`). * ELF/COFF: AArch64MCExpr::VK_ => AArch64::S_ (VK_ABS/VK_PAGE_ABS are also used by Mach-O as a hack) * Mach-O: AArch64MCExpr::M_ => AArch64::S_MACHO_ * shared: AArch64MCExpr::None => AArch64::S_None Apologies for the churn following the recent rename in #132595. This change ensures consistency after introducing MCSpecifierExpr to replace MCTargetSpecifier subclasses. Pull Request: #144633
1 parent ed5f8f2 commit 30922f7

14 files changed

+564
-581
lines changed

‎bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1081,15 +1081,15 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
10811081

10821082
if (isADR(Inst) || RelType == ELF::R_AARCH64_ADR_PREL_LO21 ||
10831083
RelType == ELF::R_AARCH64_TLSDESC_ADR_PREL21) {
1084-
return MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_ABS, Ctx);
1084+
return MCSpecifierExpr::create(Expr, AArch64::S_ABS, Ctx);
10851085
} else if (isADRP(Inst) || RelType == ELF::R_AARCH64_ADR_PREL_PG_HI21 ||
10861086
RelType == ELF::R_AARCH64_ADR_PREL_PG_HI21_NC ||
10871087
RelType == ELF::R_AARCH64_TLSDESC_ADR_PAGE21 ||
10881088
RelType == ELF::R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 ||
10891089
RelType == ELF::R_AARCH64_ADR_GOT_PAGE) {
10901090
// Never emit a GOT reloc, we handled this in
10911091
// RewriteInstance::readRelocations().
1092-
return MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_ABS_PAGE, Ctx);
1092+
return MCSpecifierExpr::create(Expr, AArch64::S_ABS_PAGE, Ctx);
10931093
} else {
10941094
switch (RelType) {
10951095
case ELF::R_AARCH64_ADD_ABS_LO12_NC:
@@ -1103,18 +1103,18 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
11031103
case ELF::R_AARCH64_TLSDESC_LD64_LO12:
11041104
case ELF::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
11051105
case ELF::R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
1106-
return MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_LO12, Ctx);
1106+
return MCSpecifierExpr::create(Expr, AArch64::S_LO12, Ctx);
11071107
case ELF::R_AARCH64_MOVW_UABS_G3:
1108-
return MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_ABS_G3, Ctx);
1108+
return MCSpecifierExpr::create(Expr, AArch64::S_ABS_G3, Ctx);
11091109
case ELF::R_AARCH64_MOVW_UABS_G2:
11101110
case ELF::R_AARCH64_MOVW_UABS_G2_NC:
1111-
return MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_ABS_G2_NC, Ctx);
1111+
return MCSpecifierExpr::create(Expr, AArch64::S_ABS_G2_NC, Ctx);
11121112
case ELF::R_AARCH64_MOVW_UABS_G1:
11131113
case ELF::R_AARCH64_MOVW_UABS_G1_NC:
1114-
return MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_ABS_G1_NC, Ctx);
1114+
return MCSpecifierExpr::create(Expr, AArch64::S_ABS_G1_NC, Ctx);
11151115
case ELF::R_AARCH64_MOVW_UABS_G0:
11161116
case ELF::R_AARCH64_MOVW_UABS_G0_NC:
1117-
return MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_ABS_G0_NC, Ctx);
1117+
return MCSpecifierExpr::create(Expr, AArch64::S_ABS_G0_NC, Ctx);
11181118
default:
11191119
break;
11201120
}
@@ -2028,7 +2028,7 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
20282028
Inst.setOpcode(AArch64::MOVZXi);
20292029
Inst.addOperand(MCOperand::createReg(AArch64::X16));
20302030
Inst.addOperand(MCOperand::createExpr(
2031-
MCSpecifierExpr::create(Target, AArch64MCExpr::VK_ABS_G3, *Ctx)));
2031+
MCSpecifierExpr::create(Target, AArch64::S_ABS_G3, *Ctx)));
20322032
Inst.addOperand(MCOperand::createImm(0x30));
20332033
Seq.emplace_back(Inst);
20342034

@@ -2037,7 +2037,7 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
20372037
Inst.addOperand(MCOperand::createReg(AArch64::X16));
20382038
Inst.addOperand(MCOperand::createReg(AArch64::X16));
20392039
Inst.addOperand(MCOperand::createExpr(
2040-
MCSpecifierExpr::create(Target, AArch64MCExpr::VK_ABS_G2_NC, *Ctx)));
2040+
MCSpecifierExpr::create(Target, AArch64::S_ABS_G2_NC, *Ctx)));
20412041
Inst.addOperand(MCOperand::createImm(0x20));
20422042
Seq.emplace_back(Inst);
20432043

@@ -2046,7 +2046,7 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
20462046
Inst.addOperand(MCOperand::createReg(AArch64::X16));
20472047
Inst.addOperand(MCOperand::createReg(AArch64::X16));
20482048
Inst.addOperand(MCOperand::createExpr(
2049-
MCSpecifierExpr::create(Target, AArch64MCExpr::VK_ABS_G1_NC, *Ctx)));
2049+
MCSpecifierExpr::create(Target, AArch64::S_ABS_G1_NC, *Ctx)));
20502050
Inst.addOperand(MCOperand::createImm(0x10));
20512051
Seq.emplace_back(Inst);
20522052

@@ -2055,7 +2055,7 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
20552055
Inst.addOperand(MCOperand::createReg(AArch64::X16));
20562056
Inst.addOperand(MCOperand::createReg(AArch64::X16));
20572057
Inst.addOperand(MCOperand::createExpr(
2058-
MCSpecifierExpr::create(Target, AArch64MCExpr::VK_ABS_G0_NC, *Ctx)));
2058+
MCSpecifierExpr::create(Target, AArch64::S_ABS_G0_NC, *Ctx)));
20592059
Inst.addOperand(MCOperand::createImm(0));
20602060
Seq.emplace_back(Inst);
20612061

‎llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@
1919
#include "AArch64TargetObjectFile.h"
2020
#include "MCTargetDesc/AArch64AddressingModes.h"
2121
#include "MCTargetDesc/AArch64InstPrinter.h"
22-
#include "MCTargetDesc/AArch64MCExpr.h"
22+
#include "MCTargetDesc/AArch64MCAsmInfo.h"
2323
#include "MCTargetDesc/AArch64MCTargetDesc.h"
2424
#include "MCTargetDesc/AArch64TargetStreamer.h"
2525
#include "TargetInfo/AArch64TargetInfo.h"
@@ -910,15 +910,15 @@ void AArch64AsmPrinter::emitHwasanMemaccessSymbols(Module &M) {
910910
// have a chance to save them.
911911
EmitToStreamer(MCInstBuilder(AArch64::ADRP)
912912
.addReg(AArch64::X16)
913-
.addExpr(MCSpecifierExpr::create(
914-
HwasanTagMismatchRef, AArch64MCExpr::VK_GOT_PAGE,
915-
OutContext)));
913+
.addExpr(MCSpecifierExpr::create(HwasanTagMismatchRef,
914+
AArch64::S_GOT_PAGE,
915+
OutContext)));
916916
EmitToStreamer(MCInstBuilder(AArch64::LDRXui)
917917
.addReg(AArch64::X16)
918918
.addReg(AArch64::X16)
919-
.addExpr(MCSpecifierExpr::create(
920-
HwasanTagMismatchRef, AArch64MCExpr::VK_GOT_LO12,
921-
OutContext)));
919+
.addExpr(MCSpecifierExpr::create(HwasanTagMismatchRef,
920+
AArch64::S_GOT_LO12,
921+
OutContext)));
922922
EmitToStreamer(MCInstBuilder(AArch64::BR).addReg(AArch64::X16));
923923
}
924924
}

‎llvm/lib/Target/AArch64/AArch64MCInstLower.cpp

Lines changed: 37 additions & 38 deletions
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,7 @@
1313

1414
#include "AArch64MCInstLower.h"
1515
#include "AArch64MachineFunctionInfo.h"
16-
#include "MCTargetDesc/AArch64MCExpr.h"
16+
#include "MCTargetDesc/AArch64MCAsmInfo.h"
1717
#include "Utils/AArch64BaseInfo.h"
1818
#include "llvm/CodeGen/AsmPrinter.h"
1919
#include "llvm/CodeGen/MachineBasicBlock.h"
@@ -147,29 +147,29 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandMachO(const MachineOperand &MO,
147147
MCSymbol *Sym) const {
148148
// FIXME: We would like an efficient form for this, so we don't have to do a
149149
// lot of extra uniquing.
150-
auto Spec = AArch64MCExpr::None;
150+
auto Spec = AArch64::S_None;
151151
if ((MO.getTargetFlags() & AArch64II::MO_GOT) != 0) {
152152
if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGE)
153-
Spec = AArch64MCExpr::M_GOTPAGE;
153+
Spec = AArch64::S_MACHO_GOTPAGE;
154154
else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) ==
155155
AArch64II::MO_PAGEOFF)
156-
Spec = AArch64MCExpr::M_GOTPAGEOFF;
156+
Spec = AArch64::S_MACHO_GOTPAGEOFF;
157157
else
158158
llvm_unreachable("Unexpected target flags with MO_GOT on GV operand");
159159
} else if ((MO.getTargetFlags() & AArch64II::MO_TLS) != 0) {
160160
if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGE)
161-
Spec = AArch64MCExpr::M_TLVPPAGE;
161+
Spec = AArch64::S_MACHO_TLVPPAGE;
162162
else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) ==
163163
AArch64II::MO_PAGEOFF)
164-
Spec = AArch64MCExpr::M_TLVPPAGEOFF;
164+
Spec = AArch64::S_MACHO_TLVPPAGEOFF;
165165
else
166166
llvm_unreachable("Unexpected target flags with MO_TLS on GV operand");
167167
} else {
168168
if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGE)
169-
Spec = AArch64MCExpr::M_PAGE;
169+
Spec = AArch64::S_MACHO_PAGE;
170170
else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) ==
171171
AArch64II::MO_PAGEOFF)
172-
Spec = AArch64MCExpr::M_PAGEOFF;
172+
Spec = AArch64::S_MACHO_PAGEOFF;
173173
}
174174
// TODO: Migrate to MCSpecifierExpr::create like ELF.
175175
const MCExpr *Expr = MCSymbolRefExpr::create(Sym, Spec, Ctx);
@@ -186,8 +186,8 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandELF(const MachineOperand &MO,
186186
if (MO.getTargetFlags() & AArch64II::MO_GOT) {
187187
const MachineFunction *MF = MO.getParent()->getParent()->getParent();
188188
RefFlags |= (MF->getInfo<AArch64FunctionInfo>()->hasELFSignedGOT()
189-
? AArch64MCExpr::VK_GOT_AUTH
190-
: AArch64MCExpr::VK_GOT);
189+
? AArch64::S_GOT_AUTH
190+
: AArch64::S_GOT);
191191
} else if (MO.getTargetFlags() & AArch64II::MO_TLS) {
192192
TLSModel::Model Model;
193193
if (MO.isGlobal()) {
@@ -211,13 +211,13 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandELF(const MachineOperand &MO,
211211
}
212212
switch (Model) {
213213
case TLSModel::InitialExec:
214-
RefFlags |= AArch64MCExpr::VK_GOTTPREL;
214+
RefFlags |= AArch64::S_GOTTPREL;
215215
break;
216216
case TLSModel::LocalExec:
217-
RefFlags |= AArch64MCExpr::VK_TPREL;
217+
RefFlags |= AArch64::S_TPREL;
218218
break;
219219
case TLSModel::LocalDynamic:
220-
RefFlags |= AArch64MCExpr::VK_DTPREL;
220+
RefFlags |= AArch64::S_DTPREL;
221221
break;
222222
case TLSModel::GeneralDynamic: {
223223
// TODO: it's probably better to introduce MO_TLS_AUTH or smth and avoid
@@ -226,37 +226,37 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandELF(const MachineOperand &MO,
226226
// making the field wider breaks static assertions.
227227
const MachineFunction *MF = MO.getParent()->getParent()->getParent();
228228
RefFlags |= MF->getInfo<AArch64FunctionInfo>()->hasELFSignedGOT()
229-
? AArch64MCExpr::VK_TLSDESC_AUTH
230-
: AArch64MCExpr::VK_TLSDESC;
229+
? AArch64::S_TLSDESC_AUTH
230+
: AArch64::S_TLSDESC;
231231
break;
232232
}
233233
}
234234
} else if (MO.getTargetFlags() & AArch64II::MO_PREL) {
235-
RefFlags |= AArch64MCExpr::VK_PREL;
235+
RefFlags |= AArch64::S_PREL;
236236
} else {
237237
// No modifier means this is a generic reference, classified as absolute for
238238
// the cases where it matters (:abs_g0: etc).
239-
RefFlags |= AArch64MCExpr::VK_ABS;
239+
RefFlags |= AArch64::S_ABS;
240240
}
241241

242242
if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGE)
243-
RefFlags |= AArch64MCExpr::VK_PAGE;
243+
RefFlags |= AArch64::S_PAGE;
244244
else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) ==
245245
AArch64II::MO_PAGEOFF)
246-
RefFlags |= AArch64MCExpr::VK_PAGEOFF;
246+
RefFlags |= AArch64::S_PAGEOFF;
247247
else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G3)
248-
RefFlags |= AArch64MCExpr::VK_G3;
248+
RefFlags |= AArch64::S_G3;
249249
else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G2)
250-
RefFlags |= AArch64MCExpr::VK_G2;
250+
RefFlags |= AArch64::S_G2;
251251
else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G1)
252-
RefFlags |= AArch64MCExpr::VK_G1;
252+
RefFlags |= AArch64::S_G1;
253253
else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G0)
254-
RefFlags |= AArch64MCExpr::VK_G0;
254+
RefFlags |= AArch64::S_G0;
255255
else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_HI12)
256-
RefFlags |= AArch64MCExpr::VK_HI12;
256+
RefFlags |= AArch64::S_HI12;
257257

258258
if (MO.getTargetFlags() & AArch64II::MO_NC)
259-
RefFlags |= AArch64MCExpr::VK_NC;
259+
RefFlags |= AArch64::S_NC;
260260

261261
const MCExpr *Expr = MCSymbolRefExpr::create(Sym, Ctx);
262262
if (!MO.isJTI() && MO.getOffset())
@@ -276,31 +276,31 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandCOFF(const MachineOperand &MO,
276276

277277
if (MO.getTargetFlags() & AArch64II::MO_TLS) {
278278
if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGEOFF)
279-
RefFlags |= AArch64MCExpr::VK_SECREL_LO12;
279+
RefFlags |= AArch64::S_SECREL_LO12;
280280
else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) ==
281281
AArch64II::MO_HI12)
282-
RefFlags |= AArch64MCExpr::VK_SECREL_HI12;
282+
RefFlags |= AArch64::S_SECREL_HI12;
283283

284284
} else if (MO.getTargetFlags() & AArch64II::MO_S) {
285-
RefFlags |= AArch64MCExpr::VK_SABS;
285+
RefFlags |= AArch64::S_SABS;
286286
} else {
287-
RefFlags |= AArch64MCExpr::VK_ABS;
287+
RefFlags |= AArch64::S_ABS;
288288

289289
if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGE)
290-
RefFlags |= AArch64MCExpr::VK_PAGE;
290+
RefFlags |= AArch64::S_PAGE;
291291
else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) ==
292292
AArch64II::MO_PAGEOFF)
293-
RefFlags |= AArch64MCExpr::VK_PAGEOFF | AArch64MCExpr::VK_NC;
293+
RefFlags |= AArch64::S_PAGEOFF | AArch64::S_NC;
294294
}
295295

296296
if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G3)
297-
RefFlags |= AArch64MCExpr::VK_G3;
297+
RefFlags |= AArch64::S_G3;
298298
else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G2)
299-
RefFlags |= AArch64MCExpr::VK_G2;
299+
RefFlags |= AArch64::S_G2;
300300
else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G1)
301-
RefFlags |= AArch64MCExpr::VK_G1;
301+
RefFlags |= AArch64::S_G1;
302302
else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G0)
303-
RefFlags |= AArch64MCExpr::VK_G0;
303+
RefFlags |= AArch64::S_G0;
304304

305305
// FIXME: Currently we only set VK_NC for MO_G3/MO_G2/MO_G1/MO_G0. This is
306306
// because setting VK_NC for others would mean setting their respective
@@ -309,7 +309,7 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandCOFF(const MachineOperand &MO,
309309
auto MOFrag = (MO.getTargetFlags() & AArch64II::MO_FRAGMENT);
310310
if (MOFrag == AArch64II::MO_G3 || MOFrag == AArch64II::MO_G2 ||
311311
MOFrag == AArch64II::MO_G1 || MOFrag == AArch64II::MO_G0)
312-
RefFlags |= AArch64MCExpr::VK_NC;
312+
RefFlags |= AArch64::S_NC;
313313
}
314314

315315
const MCExpr *Expr = MCSymbolRefExpr::create(Sym, Ctx);
@@ -318,8 +318,7 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandCOFF(const MachineOperand &MO,
318318
Expr, MCConstantExpr::create(MO.getOffset(), Ctx), Ctx);
319319

320320
auto RefKind = static_cast<AArch64MCExpr::Specifier>(RefFlags);
321-
assert(RefKind != AArch64MCExpr::VK_INVALID &&
322-
"Invalid relocation requested");
321+
assert(RefKind != AArch64::S_INVALID && "Invalid relocation requested");
323322
Expr = MCSpecifierExpr::create(Expr, RefKind, Ctx);
324323

325324
return MCOperand::createExpr(Expr);

‎llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@
88

99
#include "AArch64TargetObjectFile.h"
1010
#include "AArch64TargetMachine.h"
11-
#include "MCTargetDesc/AArch64MCExpr.h"
11+
#include "MCTargetDesc/AArch64MCAsmInfo.h"
1212
#include "MCTargetDesc/AArch64TargetStreamer.h"
1313
#include "llvm/BinaryFormat/Dwarf.h"
1414
#include "llvm/CodeGen/MachineModuleInfoImpls.h"
@@ -25,7 +25,7 @@ using namespace dwarf;
2525
void AArch64_ELFTargetObjectFile::Initialize(MCContext &Ctx,
2626
const TargetMachine &TM) {
2727
TargetLoweringObjectFileELF::Initialize(Ctx, TM);
28-
PLTRelativeSpecifier = AArch64MCExpr::VK_PLT;
28+
PLTRelativeSpecifier = AArch64::S_PLT;
2929
SupportIndirectSymViaGOTPCRel = true;
3030

3131
// AARCH64 ELF ABI does not define static relocation type for TLS offset
@@ -61,7 +61,7 @@ const MCExpr *AArch64_ELFTargetObjectFile::getIndirectSymViaGOTPCRel(
6161
int64_t Offset, MachineModuleInfo *MMI, MCStreamer &Streamer) const {
6262
int64_t FinalOffset = Offset + MV.getConstant();
6363
const MCExpr *Res =
64-
MCSymbolRefExpr::create(Sym, AArch64MCExpr::VK_GOTPCREL, getContext());
64+
MCSymbolRefExpr::create(Sym, AArch64::S_GOTPCREL, getContext());
6565
const MCExpr *Off = MCConstantExpr::create(FinalOffset, getContext());
6666
return MCBinaryExpr::createAdd(Res, Off, getContext());
6767
}
@@ -80,7 +80,7 @@ const MCExpr *AArch64_MachoTargetObjectFile::getTTypeGlobalReference(
8080
if (Encoding & (DW_EH_PE_indirect | DW_EH_PE_pcrel)) {
8181
const MCSymbol *Sym = TM.getSymbol(GV);
8282
const MCExpr *Res =
83-
MCSymbolRefExpr::create(Sym, AArch64MCExpr::M_GOT, getContext());
83+
MCSymbolRefExpr::create(Sym, AArch64::S_MACHO_GOT, getContext());
8484
MCSymbol *PCSym = getContext().createTempSymbol();
8585
Streamer.emitLabel(PCSym);
8686
const MCExpr *PC = MCSymbolRefExpr::create(PCSym, getContext());
@@ -105,7 +105,7 @@ const MCExpr *AArch64_MachoTargetObjectFile::getIndirectSymViaGOTPCRel(
105105
// On ARM64 Darwin, we can reference symbols with foo@GOT-., which
106106
// is an indirect pc-relative reference.
107107
const MCExpr *Res =
108-
MCSymbolRefExpr::create(Sym, AArch64MCExpr::M_GOT, getContext());
108+
MCSymbolRefExpr::create(Sym, AArch64::S_MACHO_GOT, getContext());
109109
MCSymbol *PCSym = getContext().createTempSymbol();
110110
Streamer.emitLabel(PCSym);
111111
const MCExpr *PC = MCSymbolRefExpr::create(PCSym, getContext());

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