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diggerlindiggerlin
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implement milicode memcmp
1 parent bdc0119 commit 303de25

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11 files changed

+63
-10
lines changed

11 files changed

+63
-10
lines changed

‎llvm/include/llvm/CodeGen/SelectionDAG.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1257,6 +1257,9 @@ class SelectionDAG {
12571257
/// stack arguments from being clobbered.
12581258
LLVM_ABI SDValue getStackArgumentTokenFactor(SDValue Chain);
12591259

1260+
std::pair<SDValue, SDValue> getMemcmp(SDValue Chain, const SDLoc &dl,
1261+
SDValue Dst, SDValue Src, SDValue Size,
1262+
const CallInst *CI);
12601263
/* \p CI if not null is the memset call being lowered.
12611264
* \p OverrideTailCall is an optional parameter that can be used to override
12621265
* the tail call optimization decision. */

‎llvm/include/llvm/CodeGen/SelectionDAGTargetInfo.h

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,7 @@
2424
namespace llvm {
2525

2626
class SelectionDAG;
27-
27+
class CallInst;
2828
//===----------------------------------------------------------------------===//
2929
/// Targets can subclass this to parameterize the
3030
/// SelectionDAG lowering and instruction selection process.
@@ -118,8 +118,7 @@ class SelectionDAGTargetInfo {
118118
virtual std::pair<SDValue, SDValue>
119119
EmitTargetCodeForMemcmp(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain,
120120
SDValue Op1, SDValue Op2, SDValue Op3,
121-
MachinePointerInfo Op1PtrInfo,
122-
MachinePointerInfo Op2PtrInfo) const {
121+
const CallInst *CI) const {
123122
return std::make_pair(SDValue(), SDValue());
124123
}
125124

‎llvm/include/llvm/IR/RuntimeLibcalls.td

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -248,6 +248,7 @@ foreach FPTy = ["F32", "F64", "F128", "PPCF128"] in {
248248
}
249249

250250
// Memory
251+
def MEMCMP : RuntimeLibcall;
251252
def MEMCPY : RuntimeLibcall;
252253
def MEMMOVE : RuntimeLibcall;
253254
def MEMSET : RuntimeLibcall;
@@ -1739,12 +1740,14 @@ defset list<RuntimeLibcallImpl> PPCRuntimeLibcalls = {
17391740
}
17401741

17411742
defset list<RuntimeLibcallImpl> PPC64AIXCallList = {
1743+
def ___memcmp64 : RuntimeLibcallImpl<MEMCMP>;
17421744
def ___memmove64 : RuntimeLibcallImpl<MEMCPY>;
17431745
def ___memset64 : RuntimeLibcallImpl<MEMSET>;
17441746
def ___bzero64 : RuntimeLibcallImpl<BZERO>;
17451747
}
17461748

17471749
defset list<RuntimeLibcallImpl> PPC32AIXCallList = {
1750+
def ___memcmp : RuntimeLibcallImpl<MEMCMP>;
17481751
def ___memmove : RuntimeLibcallImpl<MEMMOVE>;
17491752
def ___memset : RuntimeLibcallImpl<MEMSET>;
17501753
def ___bzero : RuntimeLibcallImpl<BZERO>;

‎llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Lines changed: 39 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8820,6 +8820,45 @@ static void checkAddrSpaceIsValidForLibcall(const TargetLowering *TLI,
88208820
Twine(AS));
88218821
}
88228822
}
8823+
std::pair<SDValue, SDValue>
8824+
SelectionDAG::getMemcmp(SDValue Chain, const SDLoc &dl, SDValue Mem0,
8825+
SDValue Mem1, SDValue Size, const CallInst *CI) {
8826+
8827+
const char *LibCallName = TLI->getLibcallName(RTLIB::MEMCMP);
8828+
if (LibCallName == nullptr)
8829+
return std::make_pair(SDValue(), SDValue());
8830+
// Emit a library call.
8831+
TargetLowering::ArgListTy Args;
8832+
TargetLowering::ArgListEntry Entry;
8833+
Entry.Ty = PointerType::getUnqual(*getContext());
8834+
Entry.Node = Mem0;
8835+
Args.push_back(Entry);
8836+
Entry.Node = Mem1;
8837+
Args.push_back(Entry);
8838+
8839+
Entry.Ty = getDataLayout().getIntPtrType(*getContext());
8840+
Entry.Node = Size;
8841+
Args.push_back(Entry);
8842+
8843+
// FIXME: pass in SDLoc
8844+
TargetLowering::CallLoweringInfo CLI(*this);
8845+
bool IsTailCall = false;
8846+
bool ReturnsFirstArg = CI && funcReturnsFirstArgOfCall(*CI);
8847+
IsTailCall = CI && CI->isTailCall() &&
8848+
isInTailCallPosition(*CI, getTarget(), ReturnsFirstArg);
8849+
8850+
CLI.setDebugLoc(dl)
8851+
.setChain(Chain)
8852+
.setLibCallee(
8853+
TLI->getLibcallCallingConv(RTLIB::MEMCMP),
8854+
Type::getInt32Ty(*getContext()),
8855+
getExternalSymbol(LibCallName, TLI->getPointerTy(getDataLayout())),
8856+
std::move(Args))
8857+
.setTailCall(IsTailCall);
8858+
8859+
std::pair<SDValue, SDValue> CallResult = TLI->LowerCallTo(CLI);
8860+
return CallResult;
8861+
}
88238862

88248863
SDValue SelectionDAG::getMemcpy(
88258864
SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src, SDValue Size,

‎llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -9056,7 +9056,7 @@ bool SelectionDAGBuilder::visitMemCmpBCmpCall(const CallInst &I) {
90569056
const SelectionDAGTargetInfo &TSI = DAG.getSelectionDAGInfo();
90579057
std::pair<SDValue, SDValue> Res = TSI.EmitTargetCodeForMemcmp(
90589058
DAG, getCurSDLoc(), DAG.getRoot(), getValue(LHS), getValue(RHS),
9059-
getValue(Size), MachinePointerInfo(LHS), MachinePointerInfo(RHS));
9059+
getValue(Size), &I);
90609060
if (Res.first.getNode()) {
90619061
processIntegerCallValue(I, Res.first, true);
90629062
PendingLoads.push_back(Res.second);

‎llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.cpp

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -22,3 +22,9 @@ bool PPCSelectionDAGInfo::isTargetStrictFPOpcode(unsigned Opcode) const {
2222
return Opcode >= PPCISD::FIRST_STRICTFP_OPCODE &&
2323
Opcode <= PPCISD::LAST_STRICTFP_OPCODE;
2424
}
25+
26+
std::pair<SDValue, SDValue> PPCSelectionDAGInfo::EmitTargetCodeForMemcmp(
27+
SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2,
28+
SDValue Op3, const CallInst *CI) const {
29+
return DAG.getMemcmp(Chain, dl, Op1, Op2, Op3, CI);
30+
}

‎llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,11 @@ class PPCSelectionDAGInfo : public SelectionDAGTargetInfo {
2020
bool isTargetMemoryOpcode(unsigned Opcode) const override;
2121

2222
bool isTargetStrictFPOpcode(unsigned Opcode) const override;
23+
24+
std::pair<SDValue, SDValue>
25+
EmitTargetCodeForMemcmp(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain,
26+
SDValue Op1, SDValue Op2, SDValue Op3,
27+
const CallInst *CI) const;
2328
};
2429

2530
} // namespace llvm

‎llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -181,8 +181,7 @@ static SDValue addIPMSequence(const SDLoc &DL, SDValue CCReg,
181181

182182
std::pair<SDValue, SDValue> SystemZSelectionDAGInfo::EmitTargetCodeForMemcmp(
183183
SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src1,
184-
SDValue Src2, SDValue Size, MachinePointerInfo Op1PtrInfo,
185-
MachinePointerInfo Op2PtrInfo) const {
184+
SDValue Src2, SDValue Size, const CallInst *CI) const {
186185
SDValue CCReg;
187186
// Swap operands to invert CC == 1 vs. CC == 2 cases.
188187
if (auto *CSize = dyn_cast<ConstantSDNode>(Size)) {

‎llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -41,8 +41,7 @@ class SystemZSelectionDAGInfo : public SelectionDAGTargetInfo {
4141
std::pair<SDValue, SDValue>
4242
EmitTargetCodeForMemcmp(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain,
4343
SDValue Src1, SDValue Src2, SDValue Size,
44-
MachinePointerInfo Op1PtrInfo,
45-
MachinePointerInfo Op2PtrInfo) const override;
44+
const CallInst *CI) const override;
4645

4746
std::pair<SDValue, SDValue>
4847
EmitTargetCodeForMemchr(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain,

‎llvm/test/CodeGen/PowerPC/memintr32.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,7 @@ define i32 @memcmp_test(ptr nocapture noundef readonly %ptr1, ptr nocapture noun
1111
; CHECK-AIX-32-P9-NEXT: mflr r0
1212
; CHECK-AIX-32-P9-NEXT: stwu r1, -64(r1)
1313
; CHECK-AIX-32-P9-NEXT: stw r0, 72(r1)
14-
; CHECK-AIX-32-P9-NEXT: bl .memcmp[PR]
14+
; CHECK-AIX-32-P9-NEXT: bl .___memcmp[PR]
1515
; CHECK-AIX-32-P9-NEXT: nop
1616
; CHECK-AIX-32-P9-NEXT: addi r1, r1, 64
1717
; CHECK-AIX-32-P9-NEXT: lwz r0, 8(r1)

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