Skip to content

Commit 26ae98c

Browse files
authored
AMDGPU: Replace undef global initializers in tests with poison (#131051)
1 parent 21cef8a commit 26ae98c

File tree

82 files changed

+180
-180
lines changed

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

82 files changed

+180
-180
lines changed

llvm/test/CodeGen/AMDGPU/32-bit-local-address-space.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -80,7 +80,7 @@ define amdgpu_kernel void @mul_32bit_ptr(ptr addrspace(1) %out, ptr addrspace(3)
8080
ret void
8181
}
8282

83-
@g_lds = addrspace(3) global float undef, align 4
83+
@g_lds = addrspace(3) global float poison, align 4
8484

8585
; FUNC-LABEL: {{^}}infer_ptr_alignment_global_offset:
8686
; SI: v_mov_b32_e32 [[PTR:v[0-9]+]], 0{{$}}
@@ -93,7 +93,7 @@ define amdgpu_kernel void @infer_ptr_alignment_global_offset(ptr addrspace(1) %o
9393

9494

9595
@ptr = addrspace(3) global ptr addrspace(3) poison
96-
@dst = addrspace(3) global [16383 x i32] undef
96+
@dst = addrspace(3) global [16383 x i32] poison
9797

9898
; FUNC-LABEL: {{^}}global_ptr:
9999
; SI: ds_write_b32

llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8,8 +8,8 @@
88
; FIXME: Merge with other test. DS offset folding doesn't work due to
99
; register bank copies, and no return optimization is missing.
1010

11-
@lds0 = internal addrspace(3) global [512 x i32] undef
12-
@lds1 = internal addrspace(3) global [512 x i64] undef, align 8
11+
@lds0 = internal addrspace(3) global [512 x i32] poison
12+
@lds1 = internal addrspace(3) global [512 x i64] poison, align 8
1313

1414
declare i32 @llvm.amdgcn.workitem.id.x() #0
1515

llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -9,8 +9,8 @@
99
; FIXME: Merge with other test. DS offset folding doesn't work due to
1010
; register bank copies, and no return optimization is missing.
1111

12-
@lds0 = internal addrspace(3) global [512 x i32] undef, align 4
13-
@lds1 = internal addrspace(3) global [512 x i64] undef, align 8
12+
@lds0 = internal addrspace(3) global [512 x i32] poison, align 4
13+
@lds1 = internal addrspace(3) global [512 x i64] poison, align 8
1414

1515
declare i32 @llvm.amdgcn.workitem.id.x() #0
1616

llvm/test/CodeGen/AMDGPU/GlobalISel/global-value.illegal.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44
; ERR: LLVM ERROR: unable to legalize instruction: %{{[0-9]+}}:_(p5) = G_GLOBAL_VALUE @external_private (in function: fn_external_private)
55

66
@external_private = external addrspace(5) global i32, align 4
7-
@internal_private = internal addrspace(5) global i32 undef, align 4
7+
@internal_private = internal addrspace(5) global i32 poison, align 4
88

99
define ptr addrspace(5) @fn_external_private() {
1010
ret ptr addrspace(5) @external_private

llvm/test/CodeGen/AMDGPU/GlobalISel/hip.extern.shared.array.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,9 @@
11
; RUN: llc -global-isel -mtriple=amdgcn--amdhsa -mcpu=gfx900 -verify-machineinstrs -o - %s | FileCheck %s
22

3-
@lds0 = addrspace(3) global [512 x float] undef
4-
@lds1 = addrspace(3) global [256 x float] undef
5-
@lds2 = addrspace(3) global [4096 x float] undef
6-
@lds3 = addrspace(3) global [67 x i8] undef
3+
@lds0 = addrspace(3) global [512 x float] poison
4+
@lds1 = addrspace(3) global [256 x float] poison
5+
@lds2 = addrspace(3) global [4096 x float] poison
6+
@lds3 = addrspace(3) global [67 x i8] poison
77

88
@dynamic_shared0 = external addrspace(3) global [0 x float]
99
@dynamic_shared1 = external addrspace(3) global [0 x double]

llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constantexpr.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
22
; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -stop-after=irtranslator -o - %s | FileCheck %s
33

4-
@var = global i32 undef
4+
@var = global i32 poison
55

66
define i32 @test() {
77
; CHECK-LABEL: name: test

llvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,8 @@
22
; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=bonaire -verify-machineinstrs < %s | FileCheck %s
33
; TODO: Replace with existing DAG tests
44

5-
@lds_512_4 = internal unnamed_addr addrspace(3) global [128 x i32] undef, align 4
6-
@lds_4_8 = addrspace(3) global i32 undef, align 8
5+
@lds_512_4 = internal unnamed_addr addrspace(3) global [128 x i32] poison, align 4
6+
@lds_4_8 = addrspace(3) global i32 poison, align 8
77

88
define amdgpu_kernel void @use_lds_globals(ptr addrspace(1) %out, ptr addrspace(3) %in) #0 {
99
; CHECK-LABEL: use_lds_globals:

llvm/test/CodeGen/AMDGPU/GlobalISel/lds-relocs.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22
; FIXME: Merge with DAG test
33

44
@lds.external = external unnamed_addr addrspace(3) global [0 x i32]
5-
@lds.defined = unnamed_addr addrspace(3) global [8 x i32] undef, align 8
5+
@lds.defined = unnamed_addr addrspace(3) global [8 x i32] poison, align 8
66

77
; GCN-LABEL: {{^}}test_basic:
88
; GCN: s_add_u32 s0, lds.defined@abs32@lo, s0 ; encoding: [0xff,0x00,0x00,0x80,A,A,A,A]

llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -87,10 +87,10 @@ bb2:
8787

8888
; FIXME: These aren't localized because thesee were legalized before
8989
; the localizer, and are no longer G_GLOBAL_VALUE.
90-
@gv0 = addrspace(1) global i32 undef, align 4
91-
@gv1 = addrspace(1) global i32 undef, align 4
92-
@gv2 = addrspace(1) global i32 undef, align 4
93-
@gv3 = addrspace(1) global i32 undef, align 4
90+
@gv0 = addrspace(1) global i32 poison, align 4
91+
@gv1 = addrspace(1) global i32 poison, align 4
92+
@gv2 = addrspace(1) global i32 poison, align 4
93+
@gv3 = addrspace(1) global i32 poison, align 4
9494

9595
define amdgpu_kernel void @localize_globals(i1 %cond) {
9696
; GFX9-LABEL: localize_globals:
@@ -159,10 +159,10 @@ bb2:
159159
ret void
160160
}
161161

162-
@static.gv0 = internal addrspace(1) global i32 undef, align 4
163-
@static.gv1 = internal addrspace(1) global i32 undef, align 4
164-
@static.gv2 = internal addrspace(1) global i32 undef, align 4
165-
@static.gv3 = internal addrspace(1) global i32 undef, align 4
162+
@static.gv0 = internal addrspace(1) global i32 poison, align 4
163+
@static.gv1 = internal addrspace(1) global i32 poison, align 4
164+
@static.gv2 = internal addrspace(1) global i32 poison, align 4
165+
@static.gv3 = internal addrspace(1) global i32 poison, align 4
166166

167167
define void @localize_internal_globals(i1 %cond) {
168168
; GFX9-LABEL: localize_internal_globals:

llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -4,17 +4,17 @@
44

55
declare void @llvm.memcpy.p1.p4.i32(ptr addrspace(1) nocapture, ptr addrspace(4) nocapture, i32, i1) #0
66

7-
@lds.i32 = unnamed_addr addrspace(3) global i32 undef, align 4
8-
@lds.arr = unnamed_addr addrspace(3) global [256 x i32] undef, align 4
7+
@lds.i32 = unnamed_addr addrspace(3) global i32 poison, align 4
8+
@lds.arr = unnamed_addr addrspace(3) global [256 x i32] poison, align 4
99

10-
@global.i32 = unnamed_addr addrspace(1) global i32 undef, align 4
11-
@global.arr = unnamed_addr addrspace(1) global [256 x i32] undef, align 4
10+
@global.i32 = unnamed_addr addrspace(1) global i32 poison, align 4
11+
@global.arr = unnamed_addr addrspace(1) global [256 x i32] poison, align 4
1212

1313
;.
14-
; HSA: @lds.i32 = unnamed_addr addrspace(3) global i32 undef, align 4
15-
; HSA: @lds.arr = unnamed_addr addrspace(3) global [256 x i32] undef, align 4
16-
; HSA: @global.i32 = unnamed_addr addrspace(1) global i32 undef, align 4
17-
; HSA: @global.arr = unnamed_addr addrspace(1) global [256 x i32] undef, align 4
14+
; HSA: @lds.i32 = unnamed_addr addrspace(3) global i32 poison, align 4
15+
; HSA: @lds.arr = unnamed_addr addrspace(3) global [256 x i32] poison, align 4
16+
; HSA: @global.i32 = unnamed_addr addrspace(1) global i32 poison, align 4
17+
; HSA: @global.arr = unnamed_addr addrspace(1) global [256 x i32] poison, align 4
1818
;.
1919
define amdgpu_kernel void @store_cast_0_flat_to_group_addrspacecast() #1 {
2020
; HSA-LABEL: define {{[^@]+}}@store_cast_0_flat_to_group_addrspacecast

0 commit comments

Comments
 (0)