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MCAsmBackend: Use assert for unreachable relaxInstruction dump code
The check duplicates what fixupNeedsRelaxationAdvanced has checked. The dump code is not very useful as it does not show the instruction name.
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3 files changed

+3
-27
lines changed

3 files changed

+3
-27
lines changed

llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp

Lines changed: 1 addition & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -329,15 +329,7 @@ bool ARMAsmBackend::fixupNeedsRelaxationAdvanced(const MCFixup &Fixup,
329329
void ARMAsmBackend::relaxInstruction(MCInst &Inst,
330330
const MCSubtargetInfo &STI) const {
331331
unsigned RelaxedOp = getRelaxedOpcode(Inst.getOpcode(), STI);
332-
333-
// Return a diagnostic if we get here w/ a bogus instruction.
334-
if (RelaxedOp == Inst.getOpcode()) {
335-
SmallString<256> Tmp;
336-
raw_svector_ostream OS(Tmp);
337-
Inst.dump_pretty(OS);
338-
OS << "\n";
339-
report_fatal_error("unexpected instruction to relax: " + OS.str());
340-
}
332+
assert(RelaxedOp != Inst.getOpcode());
341333

342334
// If we are changing Thumb CBZ or CBNZ instruction to a NOP, aka tHINT, we
343335
// have to change the operands too.

llvm/lib/Target/M68k/MCTargetDesc/M68kAsmBackend.cpp

Lines changed: 1 addition & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -222,15 +222,7 @@ bool M68kAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup,
222222
void M68kAsmBackend::relaxInstruction(MCInst &Inst,
223223
const MCSubtargetInfo &STI) const {
224224
unsigned RelaxedOp = getRelaxedOpcode(Inst.getOpcode());
225-
226-
if (RelaxedOp == Inst.getOpcode()) {
227-
SmallString<256> Tmp;
228-
raw_svector_ostream OS(Tmp);
229-
Inst.dump_pretty(OS);
230-
OS << "\n";
231-
report_fatal_error("unexpected instruction to relax: " + OS.str());
232-
}
233-
225+
assert(RelaxedOp != Inst.getOpcode());
234226
Inst.setOpcode(RelaxedOp);
235227
}
236228

llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp

Lines changed: 1 addition & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -754,15 +754,7 @@ void X86AsmBackend::relaxInstruction(MCInst &Inst,
754754
// The only relaxations X86 does is from a 1byte pcrel to a 4byte pcrel.
755755
bool Is16BitMode = STI.hasFeature(X86::Is16Bit);
756756
unsigned RelaxedOp = getRelaxedOpcode(Inst, Is16BitMode);
757-
758-
if (RelaxedOp == Inst.getOpcode()) {
759-
SmallString<256> Tmp;
760-
raw_svector_ostream OS(Tmp);
761-
Inst.dump_pretty(OS);
762-
OS << "\n";
763-
report_fatal_error("unexpected instruction to relax: " + OS.str());
764-
}
765-
757+
assert(RelaxedOp != Inst.getOpcode());
766758
Inst.setOpcode(RelaxedOp);
767759
}
768760

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