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SPARC: Remove subtarget checks on setLibcallImpl
Remove the subtarget dependent useSoftMulDiv check on the mul/div libcall configuration. The libcall still needs to exist with the given ABI for the module regardless of the subtarget dependent lowering decision which is separately controlled. Also the f128<->i64 conversion calls were set twice, so eliminate the redundant setting and always do it for sparc32.
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+13
-20
lines changed

1 file changed

+13
-20
lines changed

llvm/lib/Target/Sparc/SparcISelLowering.cpp

Lines changed: 13 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -1824,20 +1824,18 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM,
18241824
setOperationAction(ISD::MULHS, MVT::i32, Expand);
18251825
setOperationAction(ISD::MUL, MVT::i32, Expand);
18261826

1827+
setLibcallImpl(RTLIB::MUL_I32, RTLIB::sparc_umul);
1828+
setLibcallImpl(RTLIB::SDIV_I32, RTLIB::sparc_div);
1829+
setLibcallImpl(RTLIB::UDIV_I32, RTLIB::sparc_udiv);
1830+
setLibcallImpl(RTLIB::SREM_I32, RTLIB::sparc_rem);
1831+
setLibcallImpl(RTLIB::UREM_I32, RTLIB::sparc_urem);
1832+
18271833
if (Subtarget->useSoftMulDiv()) {
18281834
// .umul works for both signed and unsigned
18291835
setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand);
18301836
setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand);
1831-
setLibcallImpl(RTLIB::MUL_I32, RTLIB::sparc_umul);
1832-
18331837
setOperationAction(ISD::SDIV, MVT::i32, Expand);
1834-
setLibcallImpl(RTLIB::SDIV_I32, RTLIB::sparc_div);
1835-
18361838
setOperationAction(ISD::UDIV, MVT::i32, Expand);
1837-
setLibcallImpl(RTLIB::UDIV_I32, RTLIB::sparc_udiv);
1838-
1839-
setLibcallImpl(RTLIB::SREM_I32, RTLIB::sparc_rem);
1840-
setLibcallImpl(RTLIB::UREM_I32, RTLIB::sparc_urem);
18411839
}
18421840

18431841
if (Subtarget->is64Bit()) {
@@ -1881,6 +1879,13 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM,
18811879
setOperationAction(ISD::STORE, MVT::f128, Custom);
18821880
}
18831881

1882+
if (!Subtarget->is64Bit()) {
1883+
setLibcallImpl(RTLIB::FPTOSINT_F128_I64, RTLIB::_Q_qtoll);
1884+
setLibcallImpl(RTLIB::FPTOUINT_F128_I64, RTLIB::_Q_qtoull);
1885+
setLibcallImpl(RTLIB::SINTTOFP_I64_F128, RTLIB::_Q_lltoq);
1886+
setLibcallImpl(RTLIB::UINTTOFP_I64_F128, RTLIB::_Q_ulltoq);
1887+
}
1888+
18841889
if (Subtarget->hasHardQuad()) {
18851890
setOperationAction(ISD::FADD, MVT::f128, Legal);
18861891
setOperationAction(ISD::FSUB, MVT::f128, Legal);
@@ -1896,14 +1901,6 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM,
18961901
setOperationAction(ISD::FNEG, MVT::f128, Custom);
18971902
setOperationAction(ISD::FABS, MVT::f128, Custom);
18981903
}
1899-
1900-
if (!Subtarget->is64Bit()) {
1901-
setLibcallImpl(RTLIB::FPTOSINT_F128_I64, RTLIB::_Q_qtoll);
1902-
setLibcallImpl(RTLIB::FPTOUINT_F128_I64, RTLIB::_Q_qtoull);
1903-
setLibcallImpl(RTLIB::SINTTOFP_I64_F128, RTLIB::_Q_lltoq);
1904-
setLibcallImpl(RTLIB::UINTTOFP_I64_F128, RTLIB::_Q_ulltoq);
1905-
}
1906-
19071904
} else {
19081905
// Custom legalize f128 operations.
19091906

@@ -1948,10 +1945,6 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM,
19481945
setLibcallImpl(RTLIB::FPTOUINT_F128_I32, RTLIB::_Q_qtou);
19491946
setLibcallImpl(RTLIB::SINTTOFP_I32_F128, RTLIB::_Q_itoq);
19501947
setLibcallImpl(RTLIB::UINTTOFP_I32_F128, RTLIB::_Q_utoq);
1951-
setLibcallImpl(RTLIB::FPTOSINT_F128_I64, RTLIB::_Q_qtoll);
1952-
setLibcallImpl(RTLIB::FPTOUINT_F128_I64, RTLIB::_Q_qtoull);
1953-
setLibcallImpl(RTLIB::SINTTOFP_I64_F128, RTLIB::_Q_lltoq);
1954-
setLibcallImpl(RTLIB::UINTTOFP_I64_F128, RTLIB::_Q_ulltoq);
19551948
setLibcallImpl(RTLIB::FPEXT_F32_F128, RTLIB::_Q_stoq);
19561949
setLibcallImpl(RTLIB::FPEXT_F64_F128, RTLIB::_Q_dtoq);
19571950
setLibcallImpl(RTLIB::FPROUND_F128_F32, RTLIB::_Q_qtos);

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