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Change-Id: I1208aebeabbc4df1c81f1c8f5a222688c28ef985
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llvm/lib/Target/AArch64/AArch64FrameLowering.cpp

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@@ -370,11 +370,6 @@ static StackOffset getSVEStackSize(const MachineFunction &MF) {
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return getZPRStackSize(MF) + getPPRStackSize(MF);
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}
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static bool hasSVEStackSize(const MachineFunction &MF) {
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const AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
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return AFI->getStackSizeZPR() > 0 || AFI->getStackSizePPR() > 0;
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}
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/// Returns true if PPRs are spilled as ZPRs.
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static bool arePPRsSpilledAsZPR(const MachineFunction &MF) {
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return MF.getSubtarget().getRegisterInfo()->getSpillSize(

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