[InstCombine] Fold umul.overflow(x, c1) | (x*c1 > c2) to x > c2/c1

The motivation of this pattern is to check whether the product of a
variable and a constant would be mathematically (i.e., as integer
numbers instead of bit vectors) greater than a given constant bound. The
pattern appears to occur when compiling several Rust projects (it seems
to originate from the `smallvec` crate but I have not checked this
further).

Unless `c1` is `0`, we can transform this pattern into `x > c2/c1` with
all operations working on unsigned integers. Due to undefined behavior
when an element of a non-splat vector is `0`, the transform is only
implemented for scalars and splat vectors.

Alive proof: https://alive2.llvm.org/ce/z/LawTkm

Closes #142674

Author: mskamp

llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp

@@ -3717,6 +3717,30 @@ Value *InstCombinerImpl::reassociateDisjointOr(Value *LHS, Value *RHS) {
   return nullptr;
 }
 
+/// Fold Res, Overflow = (umul.with.overflow x c1); (or Overflow (ugt Res c2))
+/// --> (ugt x (c2/c1)). This code checks whether a multiplication of two
+/// unsigned numbers (one is a constant) is mathematically greater than a
+/// second constant.
+static Value *foldOrUnsignedUMulOverflowICmp(BinaryOperator &I,
+                                             InstCombiner::BuilderTy &Builder,
+                                             const DataLayout &DL) {
+  const WithOverflowInst *WO;
+  const Value *WOV;
+  const APInt *C1, *C2;
+  if (match(&I,
+            m_c_Or(m_ExtractValue<1>(
+                       m_CombineAnd(m_WithOverflowInst(WO), m_Value(WOV))),
+                   m_OneUse(m_SpecificCmp(ICmpInst::ICMP_UGT,
+                                          m_ExtractValue<0>(m_Deferred(WOV)),
+                                          m_APInt(C2))))) &&
+      WO->getIntrinsicID() == Intrinsic::umul_with_overflow &&
+      match(WO->getRHS(), m_APInt(C1)) && !C1->isZero() && WO->hasNUses(2)) {
+    Constant *NewC = ConstantInt::get(WO->getLHS()->getType(), C2->udiv(*C1));
+    return Builder.CreateICmp(ICmpInst::ICMP_UGT, WO->getLHS(), NewC);
+  }
+  return nullptr;
+}
+
 // FIXME: We use commutative matchers (m_c_*) for some, but not all, matches
 // here. We should standardize that construct where it is needed or choose some
 // other way to ensure that commutated variants of patterns are not missed.
@@ -4150,6 +4174,11 @@ Instruction *InstCombinerImpl::visitOr(BinaryOperator &I) {
     }
   }
 
+  // Try to fold the pattern "Overflow | icmp pred Res, C2" into a single
+  // comparison instruction for umul.with.overflow.
+  if (Value *R = foldOrUnsignedUMulOverflowICmp(I, Builder, DL))
+    return replaceInstUsesWith(I, R);
+
   // (~x) | y  -->  ~(x & (~y))  iff that gets rid of inversions
   if (sinkNotIntoOtherHandOfLogicalOp(I))
     return &I;

llvm/test/Transforms/InstCombine/icmp_or_umul_overflow.ll

@@ -8,11 +8,7 @@ declare void @use.i64i1({i64, i1} %x)
 define i1 @umul_greater_than_or_overflow_const(i64 %in) {
 ; CHECK-LABEL: define i1 @umul_greater_than_or_overflow_const(
 ; CHECK-SAME: i64 [[IN:%.*]]) {
-; CHECK-NEXT:    [[TMP2:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[IN]], i64 168)
-; CHECK-NEXT:    [[TMP3:%.*]] = extractvalue { i64, i1 } [[TMP2]], 0
-; CHECK-NEXT:    [[TMP4:%.*]] = extractvalue { i64, i1 } [[TMP2]], 1
-; CHECK-NEXT:    [[TMP5:%.*]] = icmp ugt i64 [[TMP3]], -16
-; CHECK-NEXT:    [[TMP6:%.*]] = or i1 [[TMP4]], [[TMP5]]
+; CHECK-NEXT:    [[TMP6:%.*]] = icmp ugt i64 [[IN]], 109802048057794950
 ; CHECK-NEXT:    ret i1 [[TMP6]]
 ;
   %mwo = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %in, i64 168)
@@ -26,11 +22,7 @@ define i1 @umul_greater_than_or_overflow_const(i64 %in) {
 define i1 @umul_greater_than_or_overflow_const_i8(i8 %in) {
 ; CHECK-LABEL: define i1 @umul_greater_than_or_overflow_const_i8(
 ; CHECK-SAME: i8 [[IN:%.*]]) {
-; CHECK-NEXT:    [[TMP2:%.*]] = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 [[IN]], i8 24)
-; CHECK-NEXT:    [[TMP3:%.*]] = extractvalue { i8, i1 } [[TMP2]], 0
-; CHECK-NEXT:    [[TMP4:%.*]] = extractvalue { i8, i1 } [[TMP2]], 1
-; CHECK-NEXT:    [[TMP5:%.*]] = icmp ugt i8 [[TMP3]], -16
-; CHECK-NEXT:    [[TMP6:%.*]] = or i1 [[TMP4]], [[TMP5]]
+; CHECK-NEXT:    [[TMP6:%.*]] = icmp ugt i8 [[IN]], 10
 ; CHECK-NEXT:    ret i1 [[TMP6]]
 ;
   %mwo = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 %in, i8 24)
@@ -44,11 +36,7 @@ define i1 @umul_greater_than_or_overflow_const_i8(i8 %in) {
 define i1 @umul_greater_than_or_overflow_const_commuted(i64 %in) {
 ; CHECK-LABEL: define i1 @umul_greater_than_or_overflow_const_commuted(
 ; CHECK-SAME: i64 [[IN:%.*]]) {
-; CHECK-NEXT:    [[TMP2:%.*]] = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[IN]], i64 48)
-; CHECK-NEXT:    [[TMP3:%.*]] = extractvalue { i64, i1 } [[TMP2]], 0
-; CHECK-NEXT:    [[TMP4:%.*]] = extractvalue { i64, i1 } [[TMP2]], 1
-; CHECK-NEXT:    [[TMP5:%.*]] = icmp ugt i64 [[TMP3]], 9223372036854775800
-; CHECK-NEXT:    [[TMP6:%.*]] = or i1 [[TMP5]], [[TMP4]]
+; CHECK-NEXT:    [[TMP6:%.*]] = icmp ugt i64 [[IN]], 192153584101141162
 ; CHECK-NEXT:    ret i1 [[TMP6]]
 ;
   %mwo = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %in, i64 48)
@@ -62,11 +50,7 @@ define i1 @umul_greater_than_or_overflow_const_commuted(i64 %in) {
 define i1 @umul_greater_than_or_overflow_const_disjoint(i64 %in) {
 ; CHECK-LABEL: define i1 @umul_greater_than_or_overflow_const_disjoint(
 ; CHECK-SAME: i64 [[IN:%.*]]) {
-; CHECK-NEXT:    [[TMP2:%.*]] = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[IN]], i64 40)
-; CHECK-NEXT:    [[TMP3:%.*]] = extractvalue { i64, i1 } [[TMP2]], 0
-; CHECK-NEXT:    [[TMP4:%.*]] = extractvalue { i64, i1 } [[TMP2]], 1
-; CHECK-NEXT:    [[TMP5:%.*]] = icmp ugt i64 [[TMP3]], 9223372036854775800
-; CHECK-NEXT:    [[TMP6:%.*]] = or disjoint i1 [[TMP4]], [[TMP5]]
+; CHECK-NEXT:    [[TMP6:%.*]] = icmp ugt i64 [[IN]], 230584300921369395
 ; CHECK-NEXT:    ret i1 [[TMP6]]
 ;
   %mwo = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %in, i64 40)
@@ -80,11 +64,8 @@ define i1 @umul_greater_than_or_overflow_const_disjoint(i64 %in) {
 define i1 @umul_greater_than_or_overflow_const_multiuse_mul(i64 %in) {
 ; CHECK-LABEL: define i1 @umul_greater_than_or_overflow_const_multiuse_mul(
 ; CHECK-SAME: i64 [[IN:%.*]]) {
-; CHECK-NEXT:    [[MWO:%.*]] = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[IN]], i64 48)
-; CHECK-NEXT:    [[MUL:%.*]] = extractvalue { i64, i1 } [[MWO]], 0
-; CHECK-NEXT:    [[OVF:%.*]] = extractvalue { i64, i1 } [[MWO]], 1
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i64 [[MUL]], 9223372036854775800
-; CHECK-NEXT:    [[RET:%.*]] = or i1 [[OVF]], [[CMP]]
+; CHECK-NEXT:    [[MUL:%.*]] = mul i64 [[IN]], 48
+; CHECK-NEXT:    [[RET:%.*]] = icmp ugt i64 [[IN]], 192153584101141162
 ; CHECK-NEXT:    tail call void @use.i64(i64 [[MUL]])
 ; CHECK-NEXT:    ret i1 [[RET]]
 ;
@@ -100,11 +81,8 @@ define i1 @umul_greater_than_or_overflow_const_multiuse_mul(i64 %in) {
 define i1 @umul_greater_than_or_overflow_const_multiuse_overflow(i64 %in) {
 ; CHECK-LABEL: define i1 @umul_greater_than_or_overflow_const_multiuse_overflow(
 ; CHECK-SAME: i64 [[IN:%.*]]) {
-; CHECK-NEXT:    [[MWO:%.*]] = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[IN]], i64 48)
-; CHECK-NEXT:    [[MUL:%.*]] = extractvalue { i64, i1 } [[MWO]], 0
-; CHECK-NEXT:    [[OVF:%.*]] = extractvalue { i64, i1 } [[MWO]], 1
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i64 [[MUL]], 9223372036854775800
-; CHECK-NEXT:    [[RET:%.*]] = or i1 [[OVF]], [[CMP]]
+; CHECK-NEXT:    [[OVF:%.*]] = icmp ugt i64 [[IN]], 384307168202282325
+; CHECK-NEXT:    [[RET:%.*]] = icmp ugt i64 [[IN]], 192153584101141162
 ; CHECK-NEXT:    tail call void @use.i1(i1 [[OVF]])
 ; CHECK-NEXT:    ret i1 [[RET]]
 ;
@@ -120,11 +98,7 @@ define i1 @umul_greater_than_or_overflow_const_multiuse_overflow(i64 %in) {
 define <2 x i1> @umul_greater_than_or_overflow_const_vector_splat(<2 x i64> %in) {
 ; CHECK-LABEL: define <2 x i1> @umul_greater_than_or_overflow_const_vector_splat(
 ; CHECK-SAME: <2 x i64> [[IN:%.*]]) {
-; CHECK-NEXT:    [[TMP2:%.*]] = tail call { <2 x i64>, <2 x i1> } @llvm.umul.with.overflow.v2i64(<2 x i64> [[IN]], <2 x i64> splat (i64 1424))
-; CHECK-NEXT:    [[TMP3:%.*]] = extractvalue { <2 x i64>, <2 x i1> } [[TMP2]], 0
-; CHECK-NEXT:    [[TMP4:%.*]] = extractvalue { <2 x i64>, <2 x i1> } [[TMP2]], 1
-; CHECK-NEXT:    [[TMP5:%.*]] = icmp ugt <2 x i64> [[TMP3]], splat (i64 9223372036854775800)
-; CHECK-NEXT:    [[TMP6:%.*]] = or <2 x i1> [[TMP4]], [[TMP5]]
+; CHECK-NEXT:    [[TMP6:%.*]] = icmp ugt <2 x i64> [[IN]], splat (i64 6477087104532848)
 ; CHECK-NEXT:    ret <2 x i1> [[TMP6]]
 ;
   %mwo = tail call { <2 x i64>, <2 x i1> } @llvm.umul.with.overflow.v2i64(<2 x i64> %in, <2 x i64> <i64 1424, i64 1424>)
@@ -237,10 +211,10 @@ define i1 @umul_greater_than_or_overflow_const_multiuse_umul_call_negative(i64 %
 ; CHECK-LABEL: define i1 @umul_greater_than_or_overflow_const_multiuse_umul_call_negative(
 ; CHECK-SAME: i64 [[IN:%.*]]) {
 ; CHECK-NEXT:    [[TMP2:%.*]] = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[IN]], i64 48)
-; CHECK-NEXT:    [[TMP3:%.*]] = extractvalue { i64, i1 } [[TMP2]], 0
-; CHECK-NEXT:    [[TMP4:%.*]] = extractvalue { i64, i1 } [[TMP2]], 1
-; CHECK-NEXT:    [[TMP5:%.*]] = icmp ugt i64 [[TMP3]], 9223372036854775800
-; CHECK-NEXT:    [[TMP6:%.*]] = or i1 [[TMP4]], [[TMP5]]
+; CHECK-NEXT:    [[MUL:%.*]] = extractvalue { i64, i1 } [[TMP2]], 0
+; CHECK-NEXT:    [[OVF:%.*]] = extractvalue { i64, i1 } [[TMP2]], 1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i64 [[MUL]], 9223372036854775800
+; CHECK-NEXT:    [[TMP6:%.*]] = or i1 [[OVF]], [[CMP]]
 ; CHECK-NEXT:    tail call void @use.i64i1({ i64, i1 } [[TMP2]])
 ; CHECK-NEXT:    ret i1 [[TMP6]]
 ;