@@ -103,6 +103,11 @@ template <unsigned Size> static unsigned getBytePosition(unsigned BitPos) {
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}
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}
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+ static void addFixup (SmallVectorImpl<MCFixup> &Fixups, uint32_t Offset,
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+ const MCExpr *Value, uint16_t Kind, bool PCRel = false ) {
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+ Fixups.push_back (MCFixup::create (Offset, Value, Kind, PCRel));
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+ }
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+
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// We need special handlings for relocatable & pc-relative operands that are
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// larger than a word.
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// A M68k instruction is aligned by word (16 bits). That means, 32-bit
@@ -139,8 +144,8 @@ void M68kMCCodeEmitter::encodeRelocImm(const MCInst &MI, unsigned OpIdx,
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// Relocatable address
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unsigned InsertByte = getBytePosition<Size>(InsertPos);
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- Fixups. push_back ( MCFixup::create ( InsertByte, Expr,
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- getFixupForSize (Size, /* IsPCRel=*/ false ) ));
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+ addFixup (Fixups, InsertByte, Expr,
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+ getFixupForSize (Size, /* IsPCRel=*/ false ));
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}
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}
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@@ -174,8 +179,7 @@ void M68kMCCodeEmitter::encodePCRelImm(const MCInst &MI, unsigned OpIdx,
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Expr, MCConstantExpr::create (LabelOffset, Ctx), Ctx);
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}
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- Fixups.push_back (MCFixup::create (InsertByte, Expr,
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- getFixupForSize (Size, /* IsPCRel=*/ true )));
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+ addFixup (Fixups, InsertByte, Expr, getFixupForSize (Size, true ), true );
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}
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}
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