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michaelmaitlandmichaelmaitland
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[RISCV][VLOPT] Add Vector Single-Width Averaging Add and Subtract to isSupportedInstr (#122351)
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‎llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp

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Original file line numberDiff line numberDiff line change
@@ -963,6 +963,15 @@ static bool isSupportedInstr(const MachineInstr &MI) {
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case RISCV::VMV_V_I:
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case RISCV::VMV_V_X:
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case RISCV::VMV_V_V:
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// Vector Single-Width Averaging Add and Subtract
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case RISCV::VAADDU_VV:
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case RISCV::VAADDU_VX:
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case RISCV::VAADD_VV:
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case RISCV::VAADD_VX:
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case RISCV::VASUBU_VV:
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case RISCV::VASUBU_VX:
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case RISCV::VASUB_VV:
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case RISCV::VASUB_VX:
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// Vector Crypto
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case RISCV::VWSLL_VI:

‎llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll

Lines changed: 176 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3595,3 +3595,179 @@ define <vscale x 4 x i32> @vmerge_vim(<vscale x 4 x i32> %a, <vscale x 4 x i1> %
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%2 = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %1, <vscale x 4 x i32> %1, iXLen %vl)
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ret <vscale x 4 x i32> %2
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}
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define <vscale x 4 x i32> @vaadd_vv(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen %vl) {
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; NOVLOPT-LABEL: vaadd_vv:
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; NOVLOPT: # %bb.0:
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; NOVLOPT-NEXT: csrwi vxrm, 0
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; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, ta, ma
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; NOVLOPT-NEXT: vaadd.vv v8, v8, v10
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; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma
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; NOVLOPT-NEXT: vadd.vv v8, v8, v10
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; NOVLOPT-NEXT: ret
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;
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; VLOPT-LABEL: vaadd_vv:
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; VLOPT: # %bb.0:
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; VLOPT-NEXT: csrwi vxrm, 0
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; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma
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; VLOPT-NEXT: vaadd.vv v8, v8, v10
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; VLOPT-NEXT: vadd.vv v8, v8, v10
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; VLOPT-NEXT: ret
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%1 = call <vscale x 4 x i32> @llvm.riscv.vaadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen 0, iXLen -1)
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%2 = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %1, <vscale x 4 x i32> %b, iXLen %vl)
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ret <vscale x 4 x i32> %2
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}
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define <vscale x 4 x i32> @vaadd_vx(<vscale x 4 x i32> %a, i32 %b, iXLen %vl) {
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; NOVLOPT-LABEL: vaadd_vx:
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; NOVLOPT: # %bb.0:
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; NOVLOPT-NEXT: csrwi vxrm, 0
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; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, ta, ma
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; NOVLOPT-NEXT: vaadd.vx v10, v8, a0
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; NOVLOPT-NEXT: vsetvli zero, a1, e32, m2, ta, ma
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; NOVLOPT-NEXT: vadd.vv v8, v10, v8
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; NOVLOPT-NEXT: ret
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;
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; VLOPT-LABEL: vaadd_vx:
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; VLOPT: # %bb.0:
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; VLOPT-NEXT: csrwi vxrm, 0
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; VLOPT-NEXT: vsetvli zero, a1, e32, m2, ta, ma
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; VLOPT-NEXT: vaadd.vx v10, v8, a0
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; VLOPT-NEXT: vadd.vv v8, v10, v8
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; VLOPT-NEXT: ret
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%1 = call <vscale x 4 x i32> @llvm.riscv.vaadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %a, i32 %b, iXLen 0, iXLen -1)
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%2 = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %1, <vscale x 4 x i32> %a, iXLen %vl)
3640+
ret <vscale x 4 x i32> %2
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}
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define <vscale x 4 x i32> @vasub_vv(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen %vl) {
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; NOVLOPT-LABEL: vasub_vv:
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; NOVLOPT: # %bb.0:
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; NOVLOPT-NEXT: csrwi vxrm, 0
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; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, ta, ma
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; NOVLOPT-NEXT: vasub.vv v8, v8, v10
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; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma
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; NOVLOPT-NEXT: vadd.vv v8, v8, v10
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; NOVLOPT-NEXT: ret
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;
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; VLOPT-LABEL: vasub_vv:
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; VLOPT: # %bb.0:
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; VLOPT-NEXT: csrwi vxrm, 0
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; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma
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; VLOPT-NEXT: vasub.vv v8, v8, v10
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; VLOPT-NEXT: vadd.vv v8, v8, v10
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; VLOPT-NEXT: ret
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%1 = call <vscale x 4 x i32> @llvm.riscv.vasub.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen 0, iXLen -1)
3661+
%2 = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %1, <vscale x 4 x i32> %b, iXLen %vl)
3662+
ret <vscale x 4 x i32> %2
3663+
}
3664+
3665+
define <vscale x 4 x i32> @vasub_vx(<vscale x 4 x i32> %a, i32 %b, iXLen %vl) {
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; NOVLOPT-LABEL: vasub_vx:
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; NOVLOPT: # %bb.0:
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; NOVLOPT-NEXT: csrwi vxrm, 0
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; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, ta, ma
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; NOVLOPT-NEXT: vasub.vx v10, v8, a0
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; NOVLOPT-NEXT: vsetvli zero, a1, e32, m2, ta, ma
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; NOVLOPT-NEXT: vadd.vv v8, v10, v8
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; NOVLOPT-NEXT: ret
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;
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; VLOPT-LABEL: vasub_vx:
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; VLOPT: # %bb.0:
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; VLOPT-NEXT: csrwi vxrm, 0
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; VLOPT-NEXT: vsetvli zero, a1, e32, m2, ta, ma
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; VLOPT-NEXT: vasub.vx v10, v8, a0
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; VLOPT-NEXT: vadd.vv v8, v10, v8
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; VLOPT-NEXT: ret
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%1 = call <vscale x 4 x i32> @llvm.riscv.vasub.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %a, i32 %b, iXLen 0, iXLen -1)
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%2 = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %1, <vscale x 4 x i32> %a, iXLen %vl)
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ret <vscale x 4 x i32> %2
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}
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3687+
define <vscale x 4 x i32> @vaaddu_vv(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen %vl) {
3688+
; NOVLOPT-LABEL: vaaddu_vv:
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; NOVLOPT: # %bb.0:
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; NOVLOPT-NEXT: csrwi vxrm, 0
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; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, ta, ma
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; NOVLOPT-NEXT: vaaddu.vv v8, v8, v10
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; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma
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; NOVLOPT-NEXT: vadd.vv v8, v8, v10
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; NOVLOPT-NEXT: ret
3696+
;
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; VLOPT-LABEL: vaaddu_vv:
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; VLOPT: # %bb.0:
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; VLOPT-NEXT: csrwi vxrm, 0
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; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma
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; VLOPT-NEXT: vaaddu.vv v8, v8, v10
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; VLOPT-NEXT: vadd.vv v8, v8, v10
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; VLOPT-NEXT: ret
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%1 = call <vscale x 4 x i32> @llvm.riscv.vaaddu.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen 0, iXLen -1)
3705+
%2 = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %1, <vscale x 4 x i32> %b, iXLen %vl)
3706+
ret <vscale x 4 x i32> %2
3707+
}
3708+
3709+
define <vscale x 4 x i32> @vaaddu_vx(<vscale x 4 x i32> %a, i32 %b, iXLen %vl) {
3710+
; NOVLOPT-LABEL: vaaddu_vx:
3711+
; NOVLOPT: # %bb.0:
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; NOVLOPT-NEXT: csrwi vxrm, 0
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; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, ta, ma
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; NOVLOPT-NEXT: vaaddu.vx v10, v8, a0
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; NOVLOPT-NEXT: vsetvli zero, a1, e32, m2, ta, ma
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; NOVLOPT-NEXT: vadd.vv v8, v10, v8
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; NOVLOPT-NEXT: ret
3718+
;
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; VLOPT-LABEL: vaaddu_vx:
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; VLOPT: # %bb.0:
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; VLOPT-NEXT: csrwi vxrm, 0
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; VLOPT-NEXT: vsetvli zero, a1, e32, m2, ta, ma
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; VLOPT-NEXT: vaaddu.vx v10, v8, a0
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; VLOPT-NEXT: vadd.vv v8, v10, v8
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; VLOPT-NEXT: ret
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%1 = call <vscale x 4 x i32> @llvm.riscv.vaaddu.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %a, i32 %b, iXLen 0, iXLen -1)
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%2 = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %1, <vscale x 4 x i32> %a, iXLen %vl)
3728+
ret <vscale x 4 x i32> %2
3729+
}
3730+
3731+
define <vscale x 4 x i32> @vasubu_vv(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen %vl) {
3732+
; NOVLOPT-LABEL: vasubu_vv:
3733+
; NOVLOPT: # %bb.0:
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; NOVLOPT-NEXT: csrwi vxrm, 0
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; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, ta, ma
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; NOVLOPT-NEXT: vasubu.vv v8, v8, v10
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; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma
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; NOVLOPT-NEXT: vadd.vv v8, v8, v10
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; NOVLOPT-NEXT: ret
3740+
;
3741+
; VLOPT-LABEL: vasubu_vv:
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; VLOPT: # %bb.0:
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; VLOPT-NEXT: csrwi vxrm, 0
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; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma
3745+
; VLOPT-NEXT: vasubu.vv v8, v8, v10
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; VLOPT-NEXT: vadd.vv v8, v8, v10
3747+
; VLOPT-NEXT: ret
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%1 = call <vscale x 4 x i32> @llvm.riscv.vasubu.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen 0, iXLen -1)
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%2 = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %1, <vscale x 4 x i32> %b, iXLen %vl)
3750+
ret <vscale x 4 x i32> %2
3751+
}
3752+
3753+
define <vscale x 4 x i32> @vasubu_vx(<vscale x 4 x i32> %a, i32 %b, iXLen %vl) {
3754+
; NOVLOPT-LABEL: vasubu_vx:
3755+
; NOVLOPT: # %bb.0:
3756+
; NOVLOPT-NEXT: csrwi vxrm, 0
3757+
; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, ta, ma
3758+
; NOVLOPT-NEXT: vasubu.vx v10, v8, a0
3759+
; NOVLOPT-NEXT: vsetvli zero, a1, e32, m2, ta, ma
3760+
; NOVLOPT-NEXT: vadd.vv v8, v10, v8
3761+
; NOVLOPT-NEXT: ret
3762+
;
3763+
; VLOPT-LABEL: vasubu_vx:
3764+
; VLOPT: # %bb.0:
3765+
; VLOPT-NEXT: csrwi vxrm, 0
3766+
; VLOPT-NEXT: vsetvli zero, a1, e32, m2, ta, ma
3767+
; VLOPT-NEXT: vasubu.vx v10, v8, a0
3768+
; VLOPT-NEXT: vadd.vv v8, v10, v8
3769+
; VLOPT-NEXT: ret
3770+
%1 = call <vscale x 4 x i32> @llvm.riscv.vasubu.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %a, i32 %b, iXLen 0, iXLen -1)
3771+
%2 = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %1, <vscale x 4 x i32> %a, iXLen %vl)
3772+
ret <vscale x 4 x i32> %2
3773+
}

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