Skip to content

Commit e9cde40

Browse files
committed
comb-to-aig test: fix typo in filecheck directive, fix capture
1 parent 34929f4 commit e9cde40

File tree

1 file changed

+3
-3
lines changed

1 file changed

+3
-3
lines changed

test/Conversion/CombToAIG/comb-to-aig-arith.mlir

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -84,9 +84,9 @@ hw.module @sub(in %lhs: i4, in %rhs: i4, out out: i4) {
8484
// ALLOW_ADD-NEXT: %[[AND2:.+]] = comb.and bin %[[XOR1]], %[[P_2_1]] : i1
8585
// ALLOW_ADD-NEXT: %[[SUM_ROW:.+]] = comb.concat %[[XOR2]], %[[XOR0]], %[[P_0_0]] : i1, i1, i1
8686
// ALLOW_ADD-NEXT: %[[CARRY_ROW:.+]] = comb.concat %[[AND0]], %false, %false : i1, i1, i1
87-
// ALLOW-ADD-NEXT: %[[RESULT]] = comb.add bin %[[SUM_ROW]], %[[CARRY_ROW]] : i3
88-
// ALLOW-ADD-NEXT: hw.output %[[RESULT]] : i3
89-
// ALLOW-ADD-NEXT: }
87+
// ALLOW_ADD-NEXT: %[[RESULT:.+]] = comb.add bin %[[SUM_ROW]], %[[CARRY_ROW]] : i3
88+
// ALLOW_ADD-NEXT: hw.output %[[RESULT]] : i3
89+
// ALLOW_ADD-NEXT: }
9090
hw.module @mul(in %lhs: i3, in %rhs: i3, out out: i3) {
9191
%0 = comb.mul %lhs, %rhs : i3
9292
hw.output %0 : i3

0 commit comments

Comments
 (0)