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| 1 | +; RUN: llc -mtriple=xcore-unknown-unknown < %s | FileCheck %s |
| 2 | + |
| 3 | +define { half, i32 } @test_frexp_f16_i32(half %a) nounwind { |
| 4 | +; CHECK-LABEL: test_frexp_f16_i32: |
| 5 | +; CHECK: bl __extendhfsf2 |
| 6 | +; CHECK: bl frexpf |
| 7 | +; CHECK: ldw r{{[0-9]+}}, sp[1] |
| 8 | +; CHECK: bl __truncsfhf2 |
| 9 | +%result = call { half, i32 } @llvm.frexp.f16.i32(half %a) |
| 10 | + ret { half, i32 } %result |
| 11 | +} |
| 12 | + |
| 13 | +define { <2 x half>, <2 x i32> } @test_frexp_v2f16_v2i32(<2 x half> %a) nounwind { |
| 14 | +; CHECK-LABEL: test_frexp_v2f16_v2i32: |
| 15 | +; CHECK: bl frexpf |
| 16 | +; CHECK: bl frexpf |
| 17 | + %result = call { <2 x half>, <2 x i32> } @llvm.frexp.v2f16.v2i32(<2 x half> %a) |
| 18 | + ret { <2 x half>, <2 x i32> } %result |
| 19 | +} |
| 20 | + |
| 21 | +define { float, i32 } @test_frexp_f32_i32(float %a) nounwind { |
| 22 | +; CHECK-LABEL: test_frexp_f32_i32: |
| 23 | +; CHECK: bl frexpf |
| 24 | + %result = call { float, i32 } @llvm.frexp.f32.i32(float %a) |
| 25 | + ret { float, i32 } %result |
| 26 | +} |
| 27 | + |
| 28 | +define { float, i32 } @test_frexp_f32_i32_tailcall(float %a) nounwind { |
| 29 | +; CHECK-LABEL: test_frexp_f32_i32_tailcall: |
| 30 | +; CHECK: bl frexpf |
| 31 | + %result = tail call { float, i32 } @llvm.frexp.f32.i32(float %a) |
| 32 | + ret { float, i32 } %result |
| 33 | +} |
| 34 | + |
| 35 | +define { <2 x float>, <2 x i32> } @test_frexp_v2f32_v2i32(<2 x float> %a) nounwind { |
| 36 | +; CHECK-LABEL: test_frexp_v2f32_v2i32: |
| 37 | +; CHECK: bl frexpf |
| 38 | +; CHECK: bl frexpf |
| 39 | + %result = call { <2 x float>, <2 x i32> } @llvm.frexp.v2f32.v2i32(<2 x float> %a) |
| 40 | + ret { <2 x float>, <2 x i32> } %result |
| 41 | +} |
| 42 | + |
| 43 | +define { double, i32 } @test_frexp_f64_i32(double %a) nounwind { |
| 44 | +; CHECK-LABEL: test_frexp_f64_i32: |
| 45 | +; CHECK: bl frexp |
| 46 | + %result = call { double, i32 } @llvm.frexp.f64.i32(double %a) |
| 47 | + ret { double, i32 } %result |
| 48 | +} |
| 49 | + |
| 50 | +define { <2 x double>, <2 x i32> } @test_frexp_v2f64_v2i32(<2 x double> %a) nounwind { |
| 51 | +; CHECK-LABEL: test_frexp_v2f64_v2i32: |
| 52 | +; CHECK: bl frexp |
| 53 | +; CHECK: bl frexp |
| 54 | + %result = call { <2 x double>, <2 x i32> } @llvm.frexp.v2f64.v2i32(<2 x double> %a) |
| 55 | + ret { <2 x double>, <2 x i32> } %result |
| 56 | +} |
| 57 | + |
| 58 | +define { fp128, i32 } @test_frexp_fp128_i32(fp128 %a) nounwind { |
| 59 | +; CHECK-LABEL: test_frexp_fp128_i32: |
| 60 | +; CHECK: bl frexpl |
| 61 | + %result = call { fp128, i32 } @llvm.frexp.fp128.i32(fp128 %a) |
| 62 | + ret { fp128, i32 } %result |
| 63 | +} |
| 64 | + |
| 65 | +define { <2 x fp128>, <2 x i32> } @test_frexp_v2fp128_v2i32(<2 x fp128> %a) nounwind { |
| 66 | +; CHECK-LABEL: test_frexp_v2fp128_v2i32: |
| 67 | +; CHECK: bl frexpl |
| 68 | +; CHECK: bl frexpl |
| 69 | + %result = call { <2 x fp128>, <2 x i32> } @llvm.frexp.v2fp128.v2i32(<2 x fp128> %a) |
| 70 | + ret { <2 x fp128>, <2 x i32> } %result |
| 71 | +} |
| 72 | + |
| 73 | +declare { half, i32 } @llvm.frexp.f16.i32(half) #0 |
| 74 | +declare { <2 x half>, <2 x i32> } @llvm.frexp.v2f16.v2i32(<2 x half>) #0 |
| 75 | + |
| 76 | +declare { float, i32 } @llvm.frexp.f32.i32(float) #0 |
| 77 | +declare { <2 x float>, <2 x i32> } @llvm.frexp.v2f32.v2i32(<2 x float>) #0 |
| 78 | + |
| 79 | +declare { double, i32 } @llvm.frexp.f64.i32(double) #0 |
| 80 | +declare { <2 x double>, <2 x i32> } @llvm.frexp.v2f64.v2i32(<2 x double>) #0 |
| 81 | + |
| 82 | +declare { fp128, i32 } @llvm.frexp.fp128.i32(fp128) #0 |
| 83 | +declare { <2 x fp128>, <2 x i32> } @llvm.frexp.v2fp128.v2i32(<2 x fp128>) #0 |
| 84 | + |
| 85 | +attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } |
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