Releases: llvm-mos/llvm-mos-sdk
Releases · llvm-mos/llvm-mos-sdk
SDK v2.4.0
New codegen features
- llvm-mos/llvm-mos#333 - Initial legalizer support for floating point types -- @rweather
- Most operations lower to libcalls; still incomplete
- A few additional legalization fixes by @mysterymath
New assembler features
- llvm-mos/llvm-mos#326 -- Finished assembler support for 45GS02 -- @mlund
Optimizations
- Constant folding for 6502-specific generic instructions.
- llvm-mos/llvm-mos#335 -- Only produce demanded bits of wide shifts
- Yields a 1-second win on 10 iterations of CoreMark.
Bug fixes
- llvm-mos/llvm-mos#329 -- Fix
c
andv
clobbers for inline assembly - llvm-mos/llvm-mos#328 -- Correct fixup for imaginary registers in prefixed mnemonics -- @mlund
- Orphan sections are now sorted using an order that includes whether the section is named for the zero page (
.zp
or.zp.*
). This helps prevent non-zero-page orphan sections from being slotted into the zero page, where they may not fit. - The same logic is now used throughout the compiler for determining whether an input section name belongs to the zero page.
- llvm-mos/llvm-mos#337 -- Fix breakage in Godbolt due to flag default being unsupported in GlobalISel
- Corrected the zero page length calculation on the
PCE
target. .zeropage[.*]
and.directpage.*
now map to.zp
in the common C linker script.
Misc
SDK v2.3.0
New features
- llvm-mos/llvm-mos#323 - Add assembly support for the 45GS02 (MEGA65) and its new opcodes over the 4510 - @mlund
- #150 - Add API for the 16x2 LCD screen on Ben Eater's breadboard computer - @rweather
Bug fixes
- llvm-mos/llvm-mos#325 - Fixed infinite loop when an invalid expression appears in a line of assembly - @johnwbyrd
SDK v2.2.0
Bug fixes
-
Don't use immediate
BIT
to setV
on CPUs other than HuC6280. On other CPUs, immediateBIT
either doesn't affectV
or clobbers it.- Thanks to @XarkLabs and @asiekierka for the diagnosis and fix recommendation.
- Also fixed the 65c02 simulator.
-
#144 - Fix error return for
cbm_k_load
for commodore targets.
New targets
- #149 -
eater
- Port to Ben Eater's 6502 Breadboard Computer, configured with a W65C51N ACAI and W65C22 VIA - @rweather
Common libraries
- #147 - Add
atoi
andatol
- @asiekierka
Platform libraries
SDK v2.1.0
Bug fixes
- Corrected
short
/[u]int16_t
alignment to 8 bits, rather than 16. - #136 -- Make
cx16.h
usable from C++ -- @mlund - #139 -- Fix breakage in PCE targets (#138) due to missing CMake library merging -- @asiekierka
New features
- llvm-mos/llvm-mos#315 -- Accept 64tass syntax (e.g.
rmb 0, $ea
) for Rockwell bit instructions -- @asiekierka - #137 -- Add
strcat
andstrncat
to libc -- @XarkLabs
Optimization
- llvm-mos/llvm-mos#316 -- Emit BRA opcode on 65DTV02 subtarget -- @asiekierka
New examples
Cleanup
- All SDK files were
clang-format
ted to LLVM style. - The SDK now merges in the library from the first ancestor target, not just the parent. This prevents issues like #138 from occurring in the future.
SDK v2.0.1
Bug fixes
Optimizations
- llvm-mos/llvm-mos#311 -- Expand small memory operations inline for all targets; emit HuC6280 block instructions -- @asiekierka
- Since the LLVM code generator will often emit very small memcpy operations, this can replace calls to
memcpy
with a much smaller and faster sequence of loads and stores.
- Since the LLVM code generator will often emit very small memcpy operations, this can replace calls to
- llvm-mos/llvm-mos#313 -- Emit 65C02 indirect (non-indexed) addressing mode -- @asiekierka
- llvm-mos/llvm-mos#314 -- Improve HuC6280 cycle counting. -- @asiekierka
- #133 - Add
__attribute__((leaf))
for commodore targets, particularly cx16. This prevents the compiler from pessimizing KERNAL calls. -- @XarkLabs
SDK v2.0.0
Breaking Changes
- #131 -- Changed
cbm_k_load
andcbm_k_save
to usevoid*
rather thanunsigned
.
Library
Misc
- llvm-mos/llvm-mos#312 -- Model bytes and cycles separately in cost calculations. This can slightly improve register allocation by giving more specific costs when optimizing for size, speed, or both.
SDK v1.2.0
Pessimizations
- Prevent power-of-two memcpy's of more than one byte from being lowered to integer loads and stores. This causes memcpy to be emitted in more places for now, but preserves the fact that the source and destination cannot alias. This will allow a more efficient lowering of these memcpy's in a nearby release.
New target
- #127 -- PC Engine CD-ROM^2 / TurboGrafx-CD (pce-cd) -- @asiekierka
Bug fixes
- #125 -- Corrected X16 imaginary register layout WRT callee/caller saved registers. -- @asiekierka
Optimizations
- Enable alias analysis in machine scheduler, which allows loads and stores that cannot alias to move past each other to reduce register pressure.
Libraries
- #128 -- Various additions to libc -- @asiekierka
SDK v1.1.0
All of the following by @asiekierka :
New platforms
- PC Engine/TurboGrafx-16 - This is a target I didn't figure we'd ever support well, given the complexities of targeting a heavily modified 6502 with a sort of MMU in it, but I'm very happy to be proven wrong. Enormous thanks, @asiekierka!
Compiler Optimizations
- llvm-mos/llvm-mos#303 - Emit BIT immediate on 65C02 to set V.
- llvm-mos/llvm-mos#303 - Emit better X<->Y transfer sequences on 65C02 and HuC6280.
Bug fixes
- llvm-mos/llvm-mos#304 - Emit correct (and new) ELF relocations for HuC6280 opcodes.
- llvm-mos/llvm-mos#307 - Fix max instruction length calculation for HuC6280, which could possibly result in emitting too-far branches.
- llvm-mos/llvm-mos#308 - Slightly correct cost calculations for imaginary register load/store on HuC6280.
- llvm-mos/llvm-mos#309 - Add accidentally missing indirect zero page opcodes (the CC1 family) to 65C02.
- #123 - Fix alignment between the Commander X16 and llvm-mos calling convention.
SDK v1.0.0
Process
- The compiler has been stable enough for long enough that it makes sense to
start using semver more formally. So, without further ado, version 1.0.0!
Breaking changes
- #115 - Breaking! - Replace
cpm_parse_filename
library function with a syscall, but with different parameters. - @davidgiven
Compiler
By @asiekierka:
- llvm-mos/llvm-mos#296 (and successor PRs) - Adds assembler support for illegal opcodes, remaining Rockwell and WDC 65C02 opcodes, WDC 65816 opcodes, and HuC6280 opcodes (PC Engine).
- llvm-mos/llvm-mos#297 - Code generator now emits
CLA
/CLX
/CLY
on HuC6280. - llvm-mos/llvm-mos#299 - Code generator now emits
TXY
/TYX
on W65816/65EL02. - llvm-mos/llvm-mos#302 - Code generator now emits
INC A
/DEC A
on 65C02.
SDK
- #114 - Update CPM65; add some missing ctype and string functions. - @davidgiven
- #117 - On Mega65 unmap $A000-$BFFF ROM region to provide 45KB of contiguous RAM. - @gurcei
By @asiekierka:
SDK v0.13.2
Bug fixes
- #112: Fix a bug in the cpm65 linker script causing certain addresses not to be relocated. Thanks @davidgiven !
Miscellaneous
-
Merged from upstream LLVM
-
Reduce distribution size by removing niche utilities.