12MB boards: Deduplicate generation of 8MB/4MB split ROMs

JonathonHall-Purism · JonathonHall-Purism · commit d512cd4ad241 · 2023-12-18T16:49:52.000-05:00
Move Makefile targets for split ROMs to targets/split_8mb4mb.mk.

Signed-off-by: Jonathon Hall &lt;jonathon.hall@puri.sm&gt;
diff --git a/boards/UNTESTED_t530-dgpu-hotp-maximized/UNTESTED_t530-dgpu-hotp-maximized.config b/boards/UNTESTED_t530-dgpu-hotp-maximized/UNTESTED_t530-dgpu-hotp-maximized.config
@@ -74,25 +74,6 @@ export CONFIG_FLASHROM_OPTIONS="--force --noverify-all -p internal"
 #      reduced IFD ME region and expanded BIOS IFD region.
 #  - blobs/xx30/extract.sh
 #     To extract from backuped 8M (bottom SPI) ME binary, GBE and IFD blobs.
-#
-# This board has two SPI flash chips, an 8 MB that holds the IFD,
-# the ME image and part of the coreboot image, and a 4 MB one that
-# has the rest of the coreboot and the reset vector.
-#   
-# As a consequence, this replaces the need of having to flash t530-flash 
-#  and expands available CBFS region (11.5Mb available CBFS space)
-#
-# When flashing via an external programmer it is easiest to have
-# two separate files for these pieces.
-all: $(board_build)/$(CB_OUTPUT_FILE)
-	@sha256sum $@ | tee -a "$(HASHES)"
-
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 8MB,$@,dd of=$@ if=$< bs=65536 count=128 skip=0 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
 
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 4MB,$@,dd of=$@ if=$< bs=65536 count=64 skip=128 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
+# Generate split 4MB top / 8MB bottom ROMs
+BOARD_TARGETS := split_8mb4mb
diff --git a/boards/UNTESTED_t530-dgpu-maximized/UNTESTED_t530-dgpu-maximized.config b/boards/UNTESTED_t530-dgpu-maximized/UNTESTED_t530-dgpu-maximized.config
@@ -74,25 +74,6 @@ export CONFIG_FLASHROM_OPTIONS="--force --noverify-all -p internal"
 #      reduced IFD ME region and expanded BIOS IFD region.
 #  - blobs/xx30/extract.sh
 #     To extract from backuped 8M (bottom SPI) ME binary, GBE and IFD blobs.
-#
-# This board has two SPI flash chips, an 8 MB that holds the IFD,
-# the ME image and part of the coreboot image, and a 4 MB one that
-# has the rest of the coreboot and the reset vector.
-#   
-# As a consequence, this replaces the need of having to flash t530-flash 
-#  and expands available CBFS region (11.5Mb available CBFS space)
-#
-# When flashing via an external programmer it is easiest to have
-# two separate files for these pieces.
-all: $(board_build)/$(CB_OUTPUT_FILE)
-	@sha256sum $@ | tee -a "$(HASHES)"
-
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 8MB,$@,dd of=$@ if=$< bs=65536 count=128 skip=0 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
 
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 4MB,$@,dd of=$@ if=$< bs=65536 count=64 skip=128 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
+# Generate split 4MB top / 8MB bottom ROMs
+BOARD_TARGETS := split_8mb4mb
diff --git a/boards/UNTESTED_t530-hotp-maximized/UNTESTED_t530-hotp-maximized.config b/boards/UNTESTED_t530-hotp-maximized/UNTESTED_t530-hotp-maximized.config
@@ -74,25 +74,6 @@ export CONFIG_FLASHROM_OPTIONS="--force --noverify-all -p internal"
 #      reduced IFD ME region and expanded BIOS IFD region.
 #  - blobs/xx30/extract.sh
 #     To extract from backuped 8M (bottom SPI) ME binary, GBE and IFD blobs.
-#
-# This board has two SPI flash chips, an 8 MB that holds the IFD,
-# the ME image and part of the coreboot image, and a 4 MB one that
-# has the rest of the coreboot and the reset vector.
-#   
-# As a consequence, this replaces the need of having to flash t530-flash 
-#  and expands available CBFS region (11.5Mb available CBFS space)
-#
-# When flashing via an external programmer it is easiest to have
-# two separate files for these pieces.
-all: $(board_build)/$(CB_OUTPUT_FILE)
-	@sha256sum $@ | tee -a "$(HASHES)"
-
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 8MB,$@,dd of=$@ if=$< bs=65536 count=128 skip=0 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
 
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 4MB,$@,dd of=$@ if=$< bs=65536 count=64 skip=128 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
+# Generate split 4MB top / 8MB bottom ROMs
+BOARD_TARGETS := split_8mb4mb
diff --git a/boards/UNTESTED_t530-maximized/UNTESTED_t530-maximized.config b/boards/UNTESTED_t530-maximized/UNTESTED_t530-maximized.config
@@ -74,25 +74,6 @@ export CONFIG_FLASHROM_OPTIONS="--force --noverify-all -p internal"
 #      reduced IFD ME region and expanded BIOS IFD region.
 #  - blobs/xx30/extract.sh
 #     To extract from backuped 8M (bottom SPI) ME binary, GBE and IFD blobs.
-#
-# This board has two SPI flash chips, an 8 MB that holds the IFD,
-# the ME image and part of the coreboot image, and a 4 MB one that
-# has the rest of the coreboot and the reset vector.
-#   
-# As a consequence, this replaces the need of having to flash t530-flash 
-#  and expands available CBFS region (11.5Mb available CBFS space)
-#
-# When flashing via an external programmer it is easiest to have
-# two separate files for these pieces.
-all: $(board_build)/$(CB_OUTPUT_FILE)
-	@sha256sum $@ | tee -a "$(HASHES)"
-
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 8MB,$@,dd of=$@ if=$< bs=65536 count=128 skip=0 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
 
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 4MB,$@,dd of=$@ if=$< bs=65536 count=64 skip=128 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
+# Generate split 4MB top / 8MB bottom ROMs
+BOARD_TARGETS := split_8mb4mb
diff --git a/boards/UNTESTED_w530-dgpu-K1000m-hotp-maximized/UNTESTED_w530-dgpu-K1000m-hotp-maximized.config b/boards/UNTESTED_w530-dgpu-K1000m-hotp-maximized/UNTESTED_w530-dgpu-K1000m-hotp-maximized.config
@@ -74,25 +74,6 @@ export CONFIG_FLASHROM_OPTIONS="--force --noverify-all -p internal"
 #      reduced IFD ME region and expanded BIOS IFD region.
 #  - blobs/xx30/extract.sh
 #     To extract from backuped 8M (bottom SPI) ME binary, GBE and IFD blobs.
-#
-# This board has two SPI flash chips, an 8 MB that holds the IFD,
-# the ME image and part of the coreboot image, and a 4 MB one that
-# has the rest of the coreboot and the reset vector.
-#   
-# As a consequence, this replaces the need of having to flash t530-flash 
-#  and expands available CBFS region (11.5Mb available CBFS space)
-#
-# When flashing via an external programmer it is easiest to have
-# two separate files for these pieces.
-all: $(board_build)/$(CB_OUTPUT_FILE)
-	@sha256sum $@ | tee -a "$(HASHES)"
-
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 8MB,$@,dd of=$@ if=$< bs=65536 count=128 skip=0 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
 
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 4MB,$@,dd of=$@ if=$< bs=65536 count=64 skip=128 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
+# Generate split 4MB top / 8MB bottom ROMs
+BOARD_TARGETS := split_8mb4mb
diff --git a/boards/UNTESTED_w530-dgpu-K1000m-maximized/UNTESTED_w530-dgpu-K1000m-maximized.config b/boards/UNTESTED_w530-dgpu-K1000m-maximized/UNTESTED_w530-dgpu-K1000m-maximized.config
@@ -74,25 +74,6 @@ export CONFIG_FLASHROM_OPTIONS="--force --noverify-all -p internal"
 #      reduced IFD ME region and expanded BIOS IFD region.
 #  - blobs/xx30/extract.sh
 #     To extract from backuped 8M (bottom SPI) ME binary, GBE and IFD blobs.
-#
-# This board has two SPI flash chips, an 8 MB that holds the IFD,
-# the ME image and part of the coreboot image, and a 4 MB one that
-# has the rest of the coreboot and the reset vector.
-#   
-# As a consequence, this replaces the need of having to flash t530-flash 
-#  and expands available CBFS region (11.5Mb available CBFS space)
-#
-# When flashing via an external programmer it is easiest to have
-# two separate files for these pieces.
-all: $(board_build)/$(CB_OUTPUT_FILE)
-	@sha256sum $@ | tee -a "$(HASHES)"
-
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 8MB,$@,dd of=$@ if=$< bs=65536 count=128 skip=0 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
 
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 4MB,$@,dd of=$@ if=$< bs=65536 count=64 skip=128 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
+# Generate split 4MB top / 8MB bottom ROMs
+BOARD_TARGETS := split_8mb4mb
diff --git a/boards/UNTESTED_w530-dgpu-K2000m-hotp-maximized/UNTESTED_w530-dgpu-K2000m-hotp-maximized.config b/boards/UNTESTED_w530-dgpu-K2000m-hotp-maximized/UNTESTED_w530-dgpu-K2000m-hotp-maximized.config
@@ -74,25 +74,6 @@ export CONFIG_FLASHROM_OPTIONS="--force --noverify-all -p internal"
 #      reduced IFD ME region and expanded BIOS IFD region.
 #  - blobs/xx30/extract.sh
 #     To extract from backuped 8M (bottom SPI) ME binary, GBE and IFD blobs.
-#
-# This board has two SPI flash chips, an 8 MB that holds the IFD,
-# the ME image and part of the coreboot image, and a 4 MB one that
-# has the rest of the coreboot and the reset vector.
-#   
-# As a consequence, this replaces the need of having to flash t530-flash 
-#  and expands available CBFS region (11.5Mb available CBFS space)
-#
-# When flashing via an external programmer it is easiest to have
-# two separate files for these pieces.
-all: $(board_build)/$(CB_OUTPUT_FILE)
-	@sha256sum $@ | tee -a "$(HASHES)"
-
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 8MB,$@,dd of=$@ if=$< bs=65536 count=128 skip=0 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
 
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 4MB,$@,dd of=$@ if=$< bs=65536 count=64 skip=128 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
+# Generate split 4MB top / 8MB bottom ROMs
+BOARD_TARGETS := split_8mb4mb
diff --git a/boards/UNTESTED_w530-dgpu-K2000m-maximized/UNTESTED_w530-dgpu-K2000m-maximized.config b/boards/UNTESTED_w530-dgpu-K2000m-maximized/UNTESTED_w530-dgpu-K2000m-maximized.config
@@ -74,25 +74,6 @@ export CONFIG_FLASHROM_OPTIONS="--force --noverify-all -p internal"
 #      reduced IFD ME region and expanded BIOS IFD region.
 #  - blobs/xx30/extract.sh
 #     To extract from backuped 8M (bottom SPI) ME binary, GBE and IFD blobs.
-#
-# This board has two SPI flash chips, an 8 MB that holds the IFD,
-# the ME image and part of the coreboot image, and a 4 MB one that
-# has the rest of the coreboot and the reset vector.
-#   
-# As a consequence, this replaces the need of having to flash t530-flash 
-#  and expands available CBFS region (11.5Mb available CBFS space)
-#
-# When flashing via an external programmer it is easiest to have
-# two separate files for these pieces.
-all: $(board_build)/$(CB_OUTPUT_FILE)
-	@sha256sum $@ | tee -a "$(HASHES)"
-
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 8MB,$@,dd of=$@ if=$< bs=65536 count=128 skip=0 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
 
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 4MB,$@,dd of=$@ if=$< bs=65536 count=64 skip=128 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
+# Generate split 4MB top / 8MB bottom ROMs
+BOARD_TARGETS := split_8mb4mb
diff --git a/boards/UNTESTED_w530-hotp-maximized/UNTESTED_w530-hotp-maximized.config b/boards/UNTESTED_w530-hotp-maximized/UNTESTED_w530-hotp-maximized.config
@@ -74,25 +74,6 @@ export CONFIG_FLASHROM_OPTIONS="--force --noverify-all -p internal"
 #      reduced IFD ME region and expanded BIOS IFD region.
 #  - blobs/xx30/extract.sh
 #     To extract from backuped 8M (bottom SPI) ME binary, GBE and IFD blobs.
-#
-# This board has two SPI flash chips, an 8 MB that holds the IFD,
-# the ME image and part of the coreboot image, and a 4 MB one that
-# has the rest of the coreboot and the reset vector.
-#   
-# As a consequence, this replaces the need of having to flash t530-flash 
-#  and expands available CBFS region (11.5Mb available CBFS space)
-#
-# When flashing via an external programmer it is easiest to have
-# two separate files for these pieces.
-all: $(board_build)/$(CB_OUTPUT_FILE)
-	@sha256sum $@ | tee -a "$(HASHES)"
-
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 8MB,$@,dd of=$@ if=$< bs=65536 count=128 skip=0 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
 
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 4MB,$@,dd of=$@ if=$< bs=65536 count=64 skip=128 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
+# Generate split 4MB top / 8MB bottom ROMs
+BOARD_TARGETS := split_8mb4mb
diff --git a/boards/UNTESTED_w530-maximized/UNTESTED_w530-maximized.config b/boards/UNTESTED_w530-maximized/UNTESTED_w530-maximized.config
@@ -74,25 +74,6 @@ export CONFIG_FLASHROM_OPTIONS="--force --noverify-all -p internal"
 #      reduced IFD ME region and expanded BIOS IFD region.
 #  - blobs/xx30/extract.sh
 #     To extract from backuped 8M (bottom SPI) ME binary, GBE and IFD blobs.
-#
-# This board has two SPI flash chips, an 8 MB that holds the IFD,
-# the ME image and part of the coreboot image, and a 4 MB one that
-# has the rest of the coreboot and the reset vector.
-#   
-# As a consequence, this replaces the need of having to flash t530-flash 
-#  and expands available CBFS region (11.5Mb available CBFS space)
-#
-# When flashing via an external programmer it is easiest to have
-# two separate files for these pieces.
-all: $(board_build)/$(CB_OUTPUT_FILE)
-	@sha256sum $@ | tee -a "$(HASHES)"
-
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 8MB,$@,dd of=$@ if=$< bs=65536 count=128 skip=0 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
 
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 4MB,$@,dd of=$@ if=$< bs=65536 count=64 skip=128 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
+# Generate split 4MB top / 8MB bottom ROMs
+BOARD_TARGETS := split_8mb4mb
diff --git a/boards/t430-hotp-maximized/t430-hotp-maximized.config b/boards/t430-hotp-maximized/t430-hotp-maximized.config
@@ -72,25 +72,6 @@ export CONFIG_FLASHROM_OPTIONS="--force --noverify-all -p internal"
 #      reduced IFD ME region and expanded BIOS IFD region.
 #  - blobs/xx30/extract.sh
 #     To extract from backuped 8M (bottom SPI) ME binary, GBE and IFD blobs.
-#
-# This board has two SPI flash chips, an 8 MB that holds the IFD,
-# the ME image and part of the coreboot image, and a 4 MB one that
-# has the rest of the coreboot and the reset vector.
-#   
-# As a consequence, this replaces the need of having to flash t430-flash 
-#  and expands available CBFS region (11.5Mb available CBFS space)
-#
-# When flashing via an external programmer it is easiest to have
-# two separate files for these pieces.
-all: $(board_build)/$(CB_OUTPUT_FILE)
-	@sha256sum $@ | tee -a "$(HASHES)"
-
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 8MB,$@,dd of=$@ if=$< bs=65536 count=128 skip=0 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
 
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 4MB,$@,dd of=$@ if=$< bs=65536 count=64 skip=128 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
+# Generate split 4MB top / 8MB bottom ROMs
+BOARD_TARGETS := split_8mb4mb
diff --git a/boards/t430-maximized/t430-maximized.config b/boards/t430-maximized/t430-maximized.config
@@ -73,25 +73,6 @@ export CONFIG_FLASHROM_OPTIONS="--force --noverify-all -p internal"
 #      reduced IFD ME region and expanded BIOS IFD region.
 #  - blobs/xx30/extract.sh
 #     To extract from backuped 8M (bottom SPI) ME binary, GBE and IFD blobs.
-#
-# This board has two SPI flash chips, an 8 MB that holds the IFD,
-# the ME image and part of the coreboot image, and a 4 MB one that
-# has the rest of the coreboot and the reset vector.
-#   
-# As a consequence, this replaces the need of having to flash t430-flash 
-#  and expands available CBFS region (11.5Mb available CBFS space)
-#
-# When flashing via an external programmer it is easiest to have
-# two separate files for these pieces.
-all: $(board_build)/$(CB_OUTPUT_FILE)
-	@sha256sum $@ | tee -a "$(HASHES)"
-
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 8MB,$@,dd of=$@ if=$< bs=65536 count=128 skip=0 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
 
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 4MB,$@,dd of=$@ if=$< bs=65536 count=64 skip=128 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
+# Generate split 4MB top / 8MB bottom ROMs
+BOARD_TARGETS := split_8mb4mb
diff --git a/boards/t440p-maximized/t440p-maximized.config b/boards/t440p-maximized/t440p-maximized.config
@@ -52,14 +52,5 @@ $(pwd)/blobs/t440p/me.bin:
 	COREBOOT_DIR="$(build)/$(coreboot_base_dir)" \
 		$(pwd)/blobs/t440p/download-clean-me $(pwd)/blobs/t440p
 
-# Haswell boards have an 8 MiB and 4 MiB SPI flash chip. So, we split the
-# Coreboot ROM into two files to flash one on each chip.
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 8MB,$@,dd of=$@ if=$< bs=65536 count=128 skip=0 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
-
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 4MB,$@,dd of=$@ if=$< bs=65536 count=64 skip=128 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
+# Generate split 4MB top / 8MB bottom ROMs
+BOARD_TARGETS := split_8mb4mb
diff --git a/boards/w541-maximized/w541-maximized.config b/boards/w541-maximized/w541-maximized.config
@@ -52,14 +52,5 @@ $(pwd)/blobs/w541/me.bin:
 	COREBOOT_DIR="$(build)/$(coreboot_base_dir)" \
 		$(pwd)/blobs/w541/download-clean-me $(pwd)/blobs/w541
 
-# Haswell boards have an 8 MiB and 4 MiB SPI flash chip. So, we split the
-# Coreboot ROM into two files to flash one on each chip.
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 8MB,$@,dd of=$@ if=$< bs=65536 count=128 skip=0 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
-
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 4MB,$@,dd of=$@ if=$< bs=65536 count=64 skip=128 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
+# Generate split 4MB top / 8MB bottom ROMs
+BOARD_TARGETS := split_8mb4mb
diff --git a/boards/x230-hotp-maximized-fhd_edp/x230-hotp-maximized-fhd_edp.config b/boards/x230-hotp-maximized-fhd_edp/x230-hotp-maximized-fhd_edp.config
@@ -86,25 +86,6 @@ export CONFIG_FLASHROM_OPTIONS="--force --noverify-all -p internal"
 #      reduced IFD ME region and expanded BIOS IFD region.
 #  - blobs/xx30/extract.sh
 #     To extract from backuped 8M (bottom SPI) ME binary, GBE and IFD blobs.
-#
-# This board has two SPI flash chips, an 8 MB that holds the IFD,
-# the ME image and part of the coreboot image, and a 4 MB one that
-# has the rest of the coreboot and the reset vector.
-#   
-# As a consequence, this replaces the need of having to flash x230-flash 
-#  and expands available CBFS region (11.5Mb available CBFS space)
-#
-# When flashing via an external programmer it is easiest to have
-# two separate files for these pieces.
-all: $(build)/$(BOARD)/$(CB_OUTPUT_FILE)
-	@sha256sum $@ | tee -a "$(HASHES)"
-
-all: $(build)/$(BOARD)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom
-$(build)/$(BOARD)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom: $(build)/$(BOARD)/$(CB_OUTPUT_FILE)
-	$(call do,DD 8MB,$@,dd of=$@ if=$< bs=65536 count=128 skip=0 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
 
-all: $(build)/$(BOARD)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom
-$(build)/$(BOARD)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom: $(build)/$(BOARD)/$(CB_OUTPUT_FILE)
-	$(call do,DD 4MB,$@,dd of=$@ if=$< bs=65536 count=64 skip=128 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
+# Generate split 4MB top / 8MB bottom ROMs
+BOARD_TARGETS := split_8mb4mb
diff --git a/boards/x230-hotp-maximized/x230-hotp-maximized.config b/boards/x230-hotp-maximized/x230-hotp-maximized.config
diff --git a/boards/x230-hotp-maximized_usb-kb/x230-hotp-maximized_usb-kb.config b/boards/x230-hotp-maximized_usb-kb/x230-hotp-maximized_usb-kb.config
diff --git a/boards/x230-maximized-fhd_edp/x230-maximized-fhd_edp.config b/boards/x230-maximized-fhd_edp/x230-maximized-fhd_edp.config
diff --git a/boards/x230-maximized/x230-maximized.config b/boards/x230-maximized/x230-maximized.config
diff --git a/targets/split_8mb4mb.mk b/targets/split_8mb4mb.mk
