Merge pull request #1556 from JonathonHall-Purism/site-local-config

Makefile: Allow downstreams to put local customizations in site-local/config

Author: tlaurion

Makefile

@@ -12,13 +12,6 @@ HEADS_GIT_VERSION	:= $(shell git describe --abbrev=7 --tags --dirty)
 # Override BRAND_NAME to set the name displayed in the UI, filenames, versions, etc.
 BRAND_NAME	?= Heads
 
-CB_OUTPUT_BASENAME	:= $(shell echo $(BRAND_NAME) | tr A-Z a-z)-$(BOARD)-$(HEADS_GIT_VERSION)
-CB_OUTPUT_FILE		:= $(CB_OUTPUT_BASENAME).rom
-CB_OUTPUT_FILE_GPG_INJ	:= $(CB_OUTPUT_BASENAME)-gpg-injected.rom
-CB_BOOTBLOCK_FILE	:= $(CB_OUTPUT_BASENAME).bootblock
-CB_UPDATE_PKG_FILE	:= $(CB_OUTPUT_BASENAME).zip
-LB_OUTPUT_FILE		:= linuxboot-$(BOARD)-$(HEADS_GIT_VERSION).rom
-
 all:
 -include .config
 
@@ -59,6 +52,20 @@ CONFIG_LEGACY_FLASH := n
 
 include $(CONFIG)
 
+# Include site-local/config only if it exists, downstreams can set configs for
+# all boards, including overriding values specified by boards.  site-local is
+# not a part of the upstream distribution but is for downstreams to insert
+# customizations at well-defined points, like in coreboot:
+# https://doc.coreboot.org/tutorial/managing_local_additions.html
+-include $(pwd)/site-local/config
+
+CB_OUTPUT_BASENAME	:= $(shell echo $(BRAND_NAME) | tr A-Z a-z)-$(BOARD)-$(HEADS_GIT_VERSION)
+CB_OUTPUT_FILE		:= $(CB_OUTPUT_BASENAME).rom
+CB_OUTPUT_FILE_GPG_INJ	:= $(CB_OUTPUT_BASENAME)-gpg-injected.rom
+CB_BOOTBLOCK_FILE	:= $(CB_OUTPUT_BASENAME).bootblock
+CB_UPDATE_PKG_FILE	:= $(CB_OUTPUT_BASENAME).zip
+LB_OUTPUT_FILE		:= linuxboot-$(BOARD)-$(HEADS_GIT_VERSION).rom
+
 # Unless otherwise specified, we are building for heads
 CONFIG_HEADS	?= y
 
@@ -74,6 +81,10 @@ else
 $(error "Unexpected value of $$(CONFIG_TARGET_ARCH): $(CONFIG_TARGET_ARCH)")
 endif
 
+ifneq "$(BOARD_TARGETS)" ""
+include targets/$(BOARD_TARGETS).mk
+endif
+
 # Create directories if they don't already exist
 BUILD_LOG	:= $(shell mkdir -p "$(log_dir)")
 PACKAGES	:= $(shell mkdir -p "$(packages)")

README.md

@@ -81,7 +81,7 @@ QEMU:
 
 OS booting can be tested in QEMU using a software TPM.  HOTP can be tested by forwarding a USB token from the host to the guest.
 
-For more information and setup instructions, refer to the [qemu-coreboot-fbwhiptail-tpm1-hotp documentation](boards/qemu-coreboot-fbwhiptail-tpm1-hotp/qemu-coreboot-fbwhiptail-tpm1-hotp.md).
+For more information and setup instructions, refer to the [qemu documentation](targets/qemu.md).
 
 coreboot console messages
 ---

boards/UNTESTED_t430-legacy-flash/UNTESTED_t430-legacy-flash.config

@@ -32,19 +32,4 @@ export CONFIG_FLASHROM_OPTIONS="--force --noverify-all -p internal --ifd --image
 
 CONFIG_LEGACY_FLASH=y
 
-# This board is "special" in that we need a 4MB top SPI flashable ROM.
-# This is enough to allow the board to boot into a minimal Heads and read the full Legacy
-# ROM from an external USB media.
-# 
-# No tools outside of flashrom are provided here as you can see per activated modules above.
-# Everything Heads is now delegated to the Legacy ROM to be flashed
-# from xx30-flash ROMs. 
-#
-# Instructions to mount USB thumb drive and flash legacy 12Mb image will be given on screen
-# per CONFIG_BOOTSCRIPT script above.
-#
-# Below, we just move produced ROM with a name appended with -top.rom for clarity.
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,MV 4MB top ROM,$@, mv $< $@)
-	@sha256sum $@
+BOARD_TARGETS := legacy_flash

boards/UNTESTED_t530-dgpu-hotp-maximized/UNTESTED_t530-dgpu-hotp-maximized.config

@@ -74,25 +74,6 @@ export CONFIG_FLASHROM_OPTIONS="--force --noverify-all -p internal"
 #      reduced IFD ME region and expanded BIOS IFD region.
 #  - blobs/xx30/extract.sh
 #     To extract from backuped 8M (bottom SPI) ME binary, GBE and IFD blobs.
-#
-# This board has two SPI flash chips, an 8 MB that holds the IFD,
-# the ME image and part of the coreboot image, and a 4 MB one that
-# has the rest of the coreboot and the reset vector.
-#   
-# As a consequence, this replaces the need of having to flash t530-flash 
-#  and expands available CBFS region (11.5Mb available CBFS space)
-#
-# When flashing via an external programmer it is easiest to have
-# two separate files for these pieces.
-all: $(board_build)/$(CB_OUTPUT_FILE)
-	@sha256sum $@ | tee -a "$(HASHES)"
-
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 8MB,$@,dd of=$@ if=$< bs=65536 count=128 skip=0 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
 
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 4MB,$@,dd of=$@ if=$< bs=65536 count=64 skip=128 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
+# Generate split 4MB top / 8MB bottom ROMs
+BOARD_TARGETS := split_8mb4mb

boards/UNTESTED_t530-dgpu-maximized/UNTESTED_t530-dgpu-maximized.config

@@ -74,25 +74,6 @@ export CONFIG_FLASHROM_OPTIONS="--force --noverify-all -p internal"
 #      reduced IFD ME region and expanded BIOS IFD region.
 #  - blobs/xx30/extract.sh
 #     To extract from backuped 8M (bottom SPI) ME binary, GBE and IFD blobs.
-#
-# This board has two SPI flash chips, an 8 MB that holds the IFD,
-# the ME image and part of the coreboot image, and a 4 MB one that
-# has the rest of the coreboot and the reset vector.
-#   
-# As a consequence, this replaces the need of having to flash t530-flash 
-#  and expands available CBFS region (11.5Mb available CBFS space)
-#
-# When flashing via an external programmer it is easiest to have
-# two separate files for these pieces.
-all: $(board_build)/$(CB_OUTPUT_FILE)
-	@sha256sum $@ | tee -a "$(HASHES)"
-
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 8MB,$@,dd of=$@ if=$< bs=65536 count=128 skip=0 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
 
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 4MB,$@,dd of=$@ if=$< bs=65536 count=64 skip=128 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
+# Generate split 4MB top / 8MB bottom ROMs
+BOARD_TARGETS := split_8mb4mb

boards/UNTESTED_t530-hotp-maximized/UNTESTED_t530-hotp-maximized.config

@@ -74,25 +74,6 @@ export CONFIG_FLASHROM_OPTIONS="--force --noverify-all -p internal"
 #      reduced IFD ME region and expanded BIOS IFD region.
 #  - blobs/xx30/extract.sh
 #     To extract from backuped 8M (bottom SPI) ME binary, GBE and IFD blobs.
-#
-# This board has two SPI flash chips, an 8 MB that holds the IFD,
-# the ME image and part of the coreboot image, and a 4 MB one that
-# has the rest of the coreboot and the reset vector.
-#   
-# As a consequence, this replaces the need of having to flash t530-flash 
-#  and expands available CBFS region (11.5Mb available CBFS space)
-#
-# When flashing via an external programmer it is easiest to have
-# two separate files for these pieces.
-all: $(board_build)/$(CB_OUTPUT_FILE)
-	@sha256sum $@ | tee -a "$(HASHES)"
-
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 8MB,$@,dd of=$@ if=$< bs=65536 count=128 skip=0 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
 
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 4MB,$@,dd of=$@ if=$< bs=65536 count=64 skip=128 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
+# Generate split 4MB top / 8MB bottom ROMs
+BOARD_TARGETS := split_8mb4mb

boards/UNTESTED_t530-maximized/UNTESTED_t530-maximized.config

@@ -74,25 +74,6 @@ export CONFIG_FLASHROM_OPTIONS="--force --noverify-all -p internal"
 #      reduced IFD ME region and expanded BIOS IFD region.
 #  - blobs/xx30/extract.sh
 #     To extract from backuped 8M (bottom SPI) ME binary, GBE and IFD blobs.
-#
-# This board has two SPI flash chips, an 8 MB that holds the IFD,
-# the ME image and part of the coreboot image, and a 4 MB one that
-# has the rest of the coreboot and the reset vector.
-#   
-# As a consequence, this replaces the need of having to flash t530-flash 
-#  and expands available CBFS region (11.5Mb available CBFS space)
-#
-# When flashing via an external programmer it is easiest to have
-# two separate files for these pieces.
-all: $(board_build)/$(CB_OUTPUT_FILE)
-	@sha256sum $@ | tee -a "$(HASHES)"
-
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 8MB,$@,dd of=$@ if=$< bs=65536 count=128 skip=0 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
 
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 4MB,$@,dd of=$@ if=$< bs=65536 count=64 skip=128 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
+# Generate split 4MB top / 8MB bottom ROMs
+BOARD_TARGETS := split_8mb4mb

boards/UNTESTED_w530-dgpu-K1000m-hotp-maximized/UNTESTED_w530-dgpu-K1000m-hotp-maximized.config

@@ -74,25 +74,6 @@ export CONFIG_FLASHROM_OPTIONS="--force --noverify-all -p internal"
 #      reduced IFD ME region and expanded BIOS IFD region.
 #  - blobs/xx30/extract.sh
 #     To extract from backuped 8M (bottom SPI) ME binary, GBE and IFD blobs.
-#
-# This board has two SPI flash chips, an 8 MB that holds the IFD,
-# the ME image and part of the coreboot image, and a 4 MB one that
-# has the rest of the coreboot and the reset vector.
-#   
-# As a consequence, this replaces the need of having to flash t530-flash 
-#  and expands available CBFS region (11.5Mb available CBFS space)
-#
-# When flashing via an external programmer it is easiest to have
-# two separate files for these pieces.
-all: $(board_build)/$(CB_OUTPUT_FILE)
-	@sha256sum $@ | tee -a "$(HASHES)"
-
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 8MB,$@,dd of=$@ if=$< bs=65536 count=128 skip=0 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
 
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 4MB,$@,dd of=$@ if=$< bs=65536 count=64 skip=128 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
+# Generate split 4MB top / 8MB bottom ROMs
+BOARD_TARGETS := split_8mb4mb

boards/UNTESTED_w530-dgpu-K1000m-maximized/UNTESTED_w530-dgpu-K1000m-maximized.config

@@ -74,25 +74,6 @@ export CONFIG_FLASHROM_OPTIONS="--force --noverify-all -p internal"
 #      reduced IFD ME region and expanded BIOS IFD region.
 #  - blobs/xx30/extract.sh
 #     To extract from backuped 8M (bottom SPI) ME binary, GBE and IFD blobs.
-#
-# This board has two SPI flash chips, an 8 MB that holds the IFD,
-# the ME image and part of the coreboot image, and a 4 MB one that
-# has the rest of the coreboot and the reset vector.
-#   
-# As a consequence, this replaces the need of having to flash t530-flash 
-#  and expands available CBFS region (11.5Mb available CBFS space)
-#
-# When flashing via an external programmer it is easiest to have
-# two separate files for these pieces.
-all: $(board_build)/$(CB_OUTPUT_FILE)
-	@sha256sum $@ | tee -a "$(HASHES)"
-
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 8MB,$@,dd of=$@ if=$< bs=65536 count=128 skip=0 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
 
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 4MB,$@,dd of=$@ if=$< bs=65536 count=64 skip=128 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
+# Generate split 4MB top / 8MB bottom ROMs
+BOARD_TARGETS := split_8mb4mb

boards/UNTESTED_w530-dgpu-K2000m-hotp-maximized/UNTESTED_w530-dgpu-K2000m-hotp-maximized.config

@@ -74,25 +74,6 @@ export CONFIG_FLASHROM_OPTIONS="--force --noverify-all -p internal"
 #      reduced IFD ME region and expanded BIOS IFD region.
 #  - blobs/xx30/extract.sh
 #     To extract from backuped 8M (bottom SPI) ME binary, GBE and IFD blobs.
-#
-# This board has two SPI flash chips, an 8 MB that holds the IFD,
-# the ME image and part of the coreboot image, and a 4 MB one that
-# has the rest of the coreboot and the reset vector.
-#   
-# As a consequence, this replaces the need of having to flash t530-flash 
-#  and expands available CBFS region (11.5Mb available CBFS space)
-#
-# When flashing via an external programmer it is easiest to have
-# two separate files for these pieces.
-all: $(board_build)/$(CB_OUTPUT_FILE)
-	@sha256sum $@ | tee -a "$(HASHES)"
-
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 8MB,$@,dd of=$@ if=$< bs=65536 count=128 skip=0 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
 
-all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom
-$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom: $(board_build)/$(CB_OUTPUT_FILE)
-	$(call do,DD 4MB,$@,dd of=$@ if=$< bs=65536 count=64 skip=128 status=none)
-	@sha256sum $@ | tee -a "$(HASHES)"
+# Generate split 4MB top / 8MB bottom ROMs
+BOARD_TARGETS := split_8mb4mb