You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
To add a new board to the Heads build hopefully you only need to modify
11
-
the coreboot configuration and add a top-level image configuration.
9
+
<!-- markdownlint-disable MD033 -->
10
+
<detailsopenmarkdown="block">
11
+
<summary>
12
+
Table of contents
13
+
</summary>
14
+
{: .text-delta }
15
+
1. TOC
16
+
{:toc}
17
+
</details>
18
+
<!-- markdownlint-enable MD033 -->
12
19
13
-
* Copy one of the existing image configurations, such as `config/x230-qubes.config`
14
-
to your new image, `config/newarch-qubes.config`, and edit the file to change
15
-
`BOARD=x230` to `BOARD=newarch`.
20
+
Prerequisites for porting Heads
21
+
===
22
+
Prerequisites:
23
+
1. coreboot port: since Heads is a coreboot payload, the board must have fully completed and actively maintained coreboot support. Any known issues should be acceptable to end users. Exceptions include the Librem and Dasharo coreboot forks, where coreboot is used from their respective forks.
24
+
2. TPM module: For full Heads functionality, the board must have a TPM module. If it uses fTPM and you plan to neuter the Intel Management Engine (ME), the fTPM must remain functional under coreboot even after neutering ME. Otherwise, a dTPM is required for this board.
25
+
3. Technical skills: the person porting the board must have basic knowledge of coreboot, Linux, Bash, Git, and Python to complete the port. While the community is committed to helping, an alternative option is financial contribution for [consultancy services](https://osresearch.net/Consultation-Services/)
26
+
4. External programmer: an external programmer is required to flash Heads and, if necessary, to recover from a brick.
27
+
5. Users and Board-testers: There should be multiple users and testers interested in using the board, as this makes maintenance and testing easier and benefits the entire ecosystem. You may, of course, port it for yourself first and allow others to join later. However, you must commit to testing—especially after coreboot version bumps or Linux kernel updates. If testing is not done in a timely manner, the board will be moved to an "unmaintained, untested" status. This would be unfortunate, potentially a waste of time, and disappointing for everyone involved.
28
+
6. GPU: dGPUs are problematic in Heads for various reasons. While successful ports on older machines with dGPUs exist (TODO: Add link), security may be affected, and there is currently no clear solution for that. (TODO: Link to Matrix coreboot discussion)
16
29
17
-
* Either copy one of the existing config files, such as the
18
-
`config/coreboot-x230.config` to `config/coreboot-newarch.conf`,
19
-
or use your existing coreboot `.config` file in its place. You'll want to
20
-
be sure that it is using a Linux payload named `./bzImage` and a Linux initrd
21
-
named `./initrd.cpio.xz`. No command line options are necessary.
The goal is to build a ROM before the code review. `new_board` refers to the name of your board, e.g., `t480`
71
+
72
+
coreboot.config:
73
+
---
74
+
you need a coreboot configuration. Ideally, this config should have already been tested and confirmed to work on the board. Alternatively, you can create one using coreboot's `make menuconfig`.
75
+
To ensure everything functions as expected, you may first build the ROM with SeaBIOS and test it. Please follow the upstream documentation, as this will save you time.
76
+
Next, the configuration needs to be adapted for Heads, specifying LinuxBoot as the payload and defining the path for required blobs. You can inspect existing configurations for boards in the master branch and select one with a similar architecture (if available). The configuration file should be placed at: `heads/config/coreboot-new_board.config`
77
+
* Note:
78
+
TPM measured boot (```CONFIG_TPM_MEASURED_BOOT=y```)and verified boot (```CONFIG_VBOOT_LIB=y```) should be enabled. If the board has TPM 2.0 those should be set to `y`. In this case, all TPM 1.2-related options should be commented out using`#`. If the Board has TPM 1.2 the reverse applies—TPM 2.0 options should be commented out. Here is a snipplet for TPM 2.0 configuration. `CONFIG_TPM=y` should be enabled in both cases.
79
+
```
80
+
CONFIG_TPM2=y
81
+
CONFIG_TPM=y
82
+
CONFIG_MAINBOARD_HAS_TPM2=y
83
+
CONFIG_TPM_LOG_TPM2=y
84
+
```
85
+
Other parameters depend on the board. It is up to you to determine the correct settings, as not all community members will have access to your board. The file should be named `coreboot-new_board.config` and placed under `config/` folder
86
+
87
+
linux.config:
88
+
---
89
+
this should be adopted from a similar board. The file should be named `linux-new_board.config` and placed under `config/` folder.
90
+
91
+
board.config:
92
+
---
93
+
there should be a file `new_board-hotp-maximized.config`, which inherits all the parameters from `new_board-maximized.config` and adds HOTP verification. This is Heads specific configuration and should be adopted from a similar platform. new_board config should point to the land the coreboot and linux.
94
+
You should point in new_board-hotp-maximized and new_board-maximized to the coreboot version e.g. `export CONFIG_COREBOOT_VERSION=24.12`- that will be modified under modules/coreboot (see corresponding section below)
95
+
Additionally, the configurations should reference the appropriate coreboot and linux configs created above:
* For early testing, enabling debug mode is a good idea. However, these options should be removed before merging:
101
+
```
102
+
export CONFIG_DEBUG_OUTPUT=y
103
+
export CONFIG_ENABLE_FUNCTION_TRACING_OUTPUT=y
104
+
```
105
+
Note: This may cause glitches where the screen output appears overwritten until an arrow key is pressed. This is normal for DEBUG mode, as the additional tracing output uses the same console as fbwhiptail. The issue will disappear once debug options are removed from the board configs.
106
+
* It is important to define the correct TPM configuration (TPM 1.2 vs. TPM 2.0), ensuring they are mutually exclusive, similar to the coreboot configuration.
107
+
```
108
+
#TPM2 requirements
109
+
export CONFIG_TPM2_TOOLS=y
110
+
export CONFIG_PRIMARY_KEY_TYPE=ecc
111
+
```
112
+
```#TPM1 requirements
113
+
#export CONFIG_TPM=y
114
+
```
115
+
In the configuration, the path to the folder containing binary blobs must be specified. These are required by coreboot for building the ROM (please see binary blobs session)
116
+
117
+
modules/coreboot:
118
+
---
119
+
coreboot fork that will be used should be added under modules/coreboot.
120
+
121
+
binary blobs:
122
+
---
123
+
Check the coreboot configuration for the ported board. This will indicate which binary blobs are required and where they are expected to be located. Heads have scripts under blobs/* which does the magic, called by board configs. Heads has scripts under blobs/* that manage binary blobs automatically. These scripts are invoked by board configurations and are essentially Makefiles that include other Makefiles, which in turn call scripts to download, modify, and place blobs where needed. This process follows coreboot’s philosophy. Those scripts dealing with blobs need to be created/modified.
124
+
Generally, three binary blobs are required: Management Engine (ME), Intel Flash Descriptor Region (IFD), and Gigabit Ethernet (GBE) The IFD and GBE can be extracted from a donor board using coreboot’s ifdtool. For more details, refer to the [uptsream documentation](https://doc.coreboot.org/util/ifdtool/layout.html)
125
+
Please note the GBE MAC address should be forged to: `00:DE:AD:C0:FF:EE MAC`. It can be done with [nvmutil](https://libreboot.org/docs/install/nvmutil.html). Due to licensing restrictions, the ME firmware cannot be uploaded to GitHub. However, scripts can be used to build it locally and within CircleCI (a gray area legally, but still possible).
126
+
* Note: When calling scripts in Nix-based environments, Python must be invoked explicitly, as Nix does not allow executing Python scripts directly from files. One can use last clean example for t480:`python ./finalimage.py` will work and just `./finalimage.py` will not work.
127
+
Blobs folder should have a script.sh which handles downloading, deactivating ME etc. It should also contain README.md file briefly explaining the process. Hashes of the blobs should stored either in `README.md` or in `hashes.txt file`.
22
128
23
-
* If you want to use `menuconfig` to reconfigure the coreboot file,
24
-
it is a little tricky since we have an external config file. From the
25
-
top level of the Heads directory you can run, for a x86 board example:
129
+
new_board.mk:
130
+
---
131
+
create a new `targets/new_board.mk` file which deals with calling blobs/script.sh* download and extraction of blobs placing the blobs in correct location.
132
+
133
+
CircleCI:
134
+
---
135
+
modify `.circleci/config.yml` to add support for `new_board`. Initially, configure it to depend directly on musl-cross-make. At this stage, do not reuse caches—this simplifies debugging and ensures a clean build process.
136
+
```
137
+
# new_board is based on xx.xx coreboot release, not sharing any buildstack from now, depend on muscl-cross cache
138
+
- build:
139
+
name: new_board-hotp-maximized
140
+
target: new_board-hotp-maximized
141
+
subcommand: ""
142
+
requires:
143
+
- x86-musl-cross-make
144
+
```
145
+
Under under CircleCI builds are reproducible, meaning you will be able to use the same (bit-to-bit) ROM on different machines to make sure you talk about the same thing, with same flashing technique/regions therefore SPI content. It optimizes the collaboration between peers-board owners. Moreover, CI builds are significantly faster than local builds, reducing overall development time.
26
146
147
+
* Optional: local builds.
148
+
If you really need to build locally during the development stage, pay attention to the helper functions at the end of the Makefiles. It is strongly recommended that local builders review the end of the Makefiles (including modules/* files), as these helper functions were designed to facilitate coreboot and Linux version bumps.
149
+
For a completely clean build (the most radical approach), remove all build artifacts using:
For Lenovo yx30 (t430, x230 and others, x230 tested only here) have the
36
-
following space available for BIOS region in IFD per output of
37
-
`ifdtool -x bottom.rom` extracted from original bottom SPI chip, initially
38
-
upgraded to latest BIOS version (2.75 for x230):
39
-
40
-
```text
41
-
Found Region Section
42
-
FLREG0: 0x00000000
43
-
Flash Region 0 (Flash Descriptor): 00000000 - 00000fff
44
-
FLREG1: 0x0bff0500
45
-
Flash Region 1 (BIOS): 00500000 - 00bfffff
46
-
FLREG2: 0x04ff0003
47
-
Flash Region 2 (Intel ME): 00003000 - 004fffff
48
-
FLREG3: 0x00020001
49
-
Flash Region 3 (GbE): 00001000 - 00002fff
50
-
FLREG4: 0x00001fff
51
-
Flash Region 4 (Platform Data): 00fff000 - 00000fff (unused)
52
-
```
53
-
54
-
Important notes:
55
-
56
-
* We cannot change the CBFS_REGION and make it larger alone (bigger BIOS)
57
-
without having IFD regions adapted so that ME region smaller and freed space
58
-
being given to the BIOS region. Providing IFD.bin alone could resolve that.
59
-
Ignoring this can result in a device booting [with no screen output from
60
-
coreboot](https://github.com/osresearch/heads/issues/667) or [not properly resuming from suspend](https://github.com/osresearch/heads/issues/608).
61
-
* When calling flash.sh, we are actually asking flashrom to take the image.rom
62
-
and flash the BIOS region out of it.
63
-
* Consequently, it seems that flashrom doesn't validate that there is enough
64
-
space and just overwrites what is there in SPI flash, resulting in a
65
-
non-booting machine.
66
-
67
-
Solution:
68
-
69
-
* We could have generic flash script (common to xx30) flash both Flash
70
-
Descriptor and BIOS regions from prepared xx30 images.
71
-
* Since those IFD regions are aligned, this means that flashed IFD
72
-
should probably become:
73
-
74
-
```text
75
-
Flash Region 1 (BIOS): 00500000 - 0001b000
76
-
Flash Region 2 (Intel ME): 00003000 - 0001afff
77
-
```
78
-
79
-
* But that means that ME will need to be neutered and flashed externally prior
80
-
of flashing the BIOS region and IFD over unlocked IFD. Instructions for this
81
-
external flashing use case, freeing and modifying ifd to reduce ME size and
82
-
expend BIOS region in consequence of liberated space can be [found here](https://github.com/corna/me_cleaner/wiki/External-flashing#neutralize-and-shrink-intel-me-useful-only-for-coreboot)
83
-
84
-
* Run `make BOARD=$BOARD_DIR` (where `$BOARD_DIR` is the board directory
85
-
(`x230`, `x230-flash` and others found under `./boards` directory) to setup
86
-
the coreboot tree, using the new coreboot config file. This will create the
87
-
output directory `build/x86/$BOARD_DIR/*.rom`, the rom name should be named
88
-
`coreboot.rom`.
89
-
90
-
* If things don't work, please open an issue on [https://github.com/osresearch/heads/issues](https://github.com/osresearch/heads/issues)
Then, inject any changes into the coreboot fork canary file so that the build system refetches, repatches, and rebuilds the coreboot fork:
158
+
```shell
159
+
echo"bogus"| sudo tee build/x86/coreboot-t480/.canary
160
+
```
161
+
Note, patches that attempt to create files that are not expected to exist but exist will fail, showing at console what files already existed that couldn't be created. In this case, you need to remove them manually `rm -rf`, and restart the build with `./docker_repro.sh BOARD=new_board` which will progress until each modules/* required per board config is successfully built.
162
+
163
+
Testing
164
+
===
165
+
166
+
For thorough testing—especially for a new board—using the following template may be beneficial.
167
+
Tasks to check, Copy and paste this template into the GitHub message window when reporting test results. Mark completed tasks with an x inside the brackets []. Replace yyy with the relevant information
168
+
```
169
+
- [ ] Successful external flash link to circleci: https://yyy from commit `yyy` using external programmer model `yyy` on `yyy` Voltage mode
170
+
- [ ] Boots successfully after the flashing:
171
+
- [ ] Setting clock prompt on first reboot: ok if triggered correctly after initial flashing and cmos battery disconnected
172
+
- [ ] Clean boot detected (no keyring, nothing installed on disk): usb boot proposed and followed: ok
173
+
- [ ] Boots on usb: ok
174
+
- [ ] OS `yyy` install and reboot: ok
175
+
- [ ] Heads functionality- no pubkey detected, but OS detected -> OEM-Factory-reset proposed. Done with `yyy` hardwarekey e.g. nk3: ok
176
+
- [ ] On reboot after re-ownership: generate new HOTP/TOTP: ok
177
+
- [ ] On reboot: default boot proposes to choose boot default + TPM DUK: ok
178
+
- [ ] TPM DUK boots OS version: ok
179
+
- [ ] TPM DUK boots QuebesOS 4.2.4: ok
180
+
- [ ] wifi works based on OS `yyy`: ok
181
+
- [ ] PR0: ok.
182
+
* flashprog -p internal (not locked)
183
+
* lock_chip (locks_
184
+
* flashprog -p internal (reports locked)
185
+
```
186
+
187
+
Debugging
188
+
===
189
+
Future debugging from Heads: enter recovery console, with a formatted USB thumb drive (fat32/exfat/ext3/ext4) and then
190
+
```shell
191
+
mount-usb --mode rw
192
+
cp /tmp/debug.log /media
193
+
cbmem -L > /media/coreboot_measured_boot.log
194
+
umount /media
195
+
```
196
+
And then provide log files in a subsequent comment. That would be really helpful if something is still wrong. Of course, this should be modified based on the problem faced.
197
+
198
+
Pull Request
199
+
===
200
+
201
+
Create an initial PR, with commits relative roughly to the steps above. Please see the guide for contributing. 1 commit does 1 major bullet point.
202
+
203
+
Then lets collaborate in the PR. Create a heads fork in your own repository, follow/comment linuxboot/heads-wiki#119 TODO create the wiki-page as you go, make sure you sign commits and don't stress too much if this seems a lot. Get a PR started and we will collaborate there.
204
+
205
+
Remove debugging mode:
206
+
===
207
+
One of last PRs should remove the debugging mode and add quite mode.
208
+
209
+
Write a flashing/dissasembling guide
210
+
===
211
+
Take pictures as you dissasemble your board and flash the Heads ROM. You can use them later to write a guide. This will help less technical community members using the board. Your effort will imporove the ecosystem.
212
+
If you cannot manage to finish writing the guide but talented enouph to finish the port just create an issue on the GitHub and drop pictures. We will try to find time to help.
213
+
The guide is essential part of the port.
214
+
215
+
Contribute to maintance
216
+
===
217
+
Refer to [Contributing on GitHub page](https://github.com/linuxboot/heads/blob/master/CONTRIBUTING.md)
218
+
219
+
Heads is free as free beer.
220
+
In the spirit of open-source software, free knowledge, and communal goodwill, support the Heads and the open source development [Insurgo Initiative - Open Collective](https://opencollective.com/insurgo).
221
+
The supply of free beer cannot be infinite. If everyone takes without giving back, at some point, the keg runs dry, and so does the goodwill.
222
+
If you enjoy free beer, contribute in some form—whether by bringing code, docs, or financial support. The cycle must be maintained to keep the ecosystem alive. No one wants to be the last guest realizing the fridge is empty and no one restocked it. Together, it is possible to keep the free beer spirit alive—open, shared, and always refreshing. Cheers!
223
+
224
+
You may examine all [github PRs with the label 'port'](https://github.com/linuxboot/heads/issues?q=label%3Aport+) to gather additional information. Good luck!
0 commit comments